HAL DMA APIs listing for migration ¶
This section provides a full listing of the HAL1 APIs for migration. It includes the various constants, enumerations, structures, functions, and macros.
HAL DMA constants ¶
|
HAL1 |
series |
HAL2 |
Refer to |
|---|---|---|---|
|
DMA_FLAG_GL8 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TC8 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_HT8 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TE8 |
g4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_ERROR_PARAM |
g0, f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_ERROR_FE |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_ERROR_DME |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_0 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_1 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_2 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_3 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_4 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_5 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_6 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_7 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_8 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_9 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_10 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_11 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_12 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_13 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_14 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_CHANNEL_15 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FIFOMODE_DISABLE |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_UCPD1_TX |
g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_UCPD1_RX |
g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_CORDIC_WRITE |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_CORDIC_READ |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_ADC4 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_ADC5 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_QUADSPI |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DAC2_CHANNEL1 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM20_CH1 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM20_CH2 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM20_CH3 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM20_CH4 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM20_UP |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM20_TRIG |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM20_COM |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_HRTIM1_M |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_FIFOMODE_ENABLE |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_HRTIM1_A |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_HRTIM1_C |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_HRTIM1_D |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_HRTIM1_E |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_HRTIM1_F |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DAC3_CHANNEL1 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DAC3_CHANNEL2 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DAC4_CHANNEL1 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DAC4_CHANNEL2 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_SPI4_RX |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_SPI4_TX |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_FMAC_READ |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_FMAC_WRITE |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_HRTIM1_B |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_FIFO_THRESHOLD_1QUARTERFULL |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FIFO_THRESHOLD_HALFFULL |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FIFO_THRESHOLD_3QUARTERSFULL |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TCIF3_7 |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_QUEUE_ERROR_NONE |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_QUEUE_ERROR_BUSY |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_QUEUE_ERROR_EMPTY |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_QUEUE_ERROR_UNSUPPORTED |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_QUEUE_ERROR_INVALIDTYPE |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_QUEUE_ERROR_OUTOFRANGE |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_QUEUE_ERROR_NOTFOUND |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_LINKEDLIST_NORMAL |
u5, h5 |
HAL_DMA_XFER_MODE_LINKEDLIST_LINEAR |
|
|
DMA_LINKEDLIST_CIRCULAR |
u5, h5 |
HAL_DMA_XFER_MODE_LINKEDLIST_CIRCULAR |
|
|
DMA_DATA_RIGHTALIGN_ZEROPADDED |
u5, h5 |
HAL_DMA_DEST_DATA_TRUNC_LEFT_PADD_ZERO |
|
|
DMA_FLAG_HTIF3_7 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_DATA_RIGHTALIGN_LEFTTRUNC |
u5, h5 |
HAL_DMA_DEST_DATA_TRUNC_LEFT_PADD_ZERO |
|
|
DMA_DATA_LEFTALIGN_RIGHTTRUNC |
u5, h5 |
HAL_DMA_DEST_DATA_TRUNC_RIGHT_PADD_SIGN |
|
|
DMA_DATA_PACK |
u5, h5 |
HAL_DMA_DEST_DATA_PRESERVED |
|
|
DMA_DATA_UNPACK |
u5, h5 |
HAL_DMA_DEST_DATA_PACKED_UNPACKED |
|
|
DMA_EXCHANGE_NONE |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_EXCHANGE_DEST_BYTE |
u5, h5 |
HAL_DMA_DEST_BYTE_EXCHANGED |
|
|
DMA_EXCHANGE_DEST_HALFWORD |
u5, h5 |
HAL_DMA_DEST_HALFWORD_EXCHANGED |
|
|
DMA_EXCHANGE_SRC_BYTE |
u5, h5 |
HAL_DMA_SRC_BYTE_EXCHANGED |
|
|
DMA_TRIG_POLARITY_MASKED |
u5, h5 |
HAL_DMA_TRIGGER_POLARITY_MASKED |
|
|
DMA_TRIG_POLARITY_RISING |
u5, h5 |
HAL_DMA_TRIGGER_POLARITY_RISING |
|
|
DMA_TRIG_POLARITY_FALLING |
u5, h5 |
HAL_DMA_TRIGGER_POLARITY_FALLING |
|
|
DMA_TRIGM_BLOCK_TRANSFER |
u5, h5 |
HAL_DMA_TRIGGER_BLOCK_TRANSFER |
|
|
DMA_TRIGM_REPEATED_BLOCK_TRANSFER |
u5, h5 |
HAL_DMA_TRIGGER_REPEATED_BLOCK_TRANSFER |
|
|
DMA_DATA_RIGHTALIGN_SIGNEXT |
u5, h5 |
HAL_DMA_DEST_DATA_TRUNC_RIGHT_PADD_SIGN |
|
|
DMA_REQUEST_ADC3 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TEIF3_7 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_FEIF3_7 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FIFO_THRESHOLD_FULL |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_MBURST_SINGLE |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_MBURST_INC4 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_MBURST_INC8 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_MBURST_INC16 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_PBURST_SINGLE |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_PBURST_INC4 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_PBURST_INC8 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_PBURST_INC16 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_IT_DME |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_IT_FE |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_FEIF0_4 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_DMEIF3_7 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_DMEIF0_4 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_HTIF0_4 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TCIF0_4 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_FEIF1_5 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_DMEIF1_5 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TEIF1_5 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_HTIF1_5 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TCIF1_5 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_FEIF2_6 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_DMEIF2_6 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TEIF2_6 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_HTIF2_6 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TCIF2_6 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TEIF0_4 |
f4 |
Not implemented yet in HAL2. |
|
|
DMA_TRIGM_LLI_LINK_TRANSFER |
u5, h5 |
HAL_DMA_TRIGGER_NODE_TRANSFER |
|
|
DMA_REQUEST_DAC1_CHANNEL2 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_GI4 |
c0, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TC4 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_HT4 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TE4 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_GI5 |
c0, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TC5 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_HT5 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TE5 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TC6 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_HT6 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TE6 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_GI7 |
c0, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TC7 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_HT7 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TE7 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_REQUEST_0 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_1 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_2 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_3 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_4 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_5 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_6 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_7 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_ADC2 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_TE3 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_HT3 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TC3 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_GI3 |
c0, g0 |
Removed / New Usage changes |
|
|
DMA_REQUEST_USART4_RX |
c0, g0 |
HAL_DMA_REQUEST_USART4_RX |
|
|
DMA_REQUEST_USART4_TX |
c0, g0 |
HAL_DMA_REQUEST_USART4_TX |
|
|
DMA_PINC_ENABLE |
c0, l4, g4, g0, f4 |
HAL_DMA_DEST_ADDR_INCREMENTED |
|
|
DMA_PINC_DISABLE |
c0, l4, g4, g0, f4 |
HAL_DMA_DEST_ADDR_FIXED |
|
|
DMA_MINC_ENABLE |
c0, l4, g4, g0, f4 |
HAL_DMA_SRC_ADDR_INCREMENTED |
|
|
DMA_MINC_DISABLE |
c0, l4, g4, g0, f4 |
HAL_DMA_SRC_ADDR_FIXED |
|
|
DMA_PDATAALIGN_BYTE |
c0, l4, g4, g0, f4 |
HAL_DMA_DEST_DATA_WIDTH_BYTE |
|
|
DMA_PDATAALIGN_HALFWORD |
c0, l4, g4, g0, f4 |
HAL_DMA_DEST_DATA_WIDTH_HALFWORD |
|
|
DMA_PDATAALIGN_WORD |
c0, l4, g4, g0, f4 |
HAL_DMA_DEST_DATA_WIDTH_WORD |
|
|
DMA_MDATAALIGN_BYTE |
c0, l4, g4, g0, f4 |
HAL_DMA_SRC_DATA_WIDTH_BYTE |
|
|
DMA_MDATAALIGN_HALFWORD |
c0, l4, g4, g0, f4 |
HAL_DMA_SRC_DATA_WIDTH_HALFWORD |
|
|
DMA_MDATAALIGN_WORD |
c0, l4, g4, g0, f4 |
HAL_DMA_SRC_DATA_WIDTH_WORD |
|
|
DMA_REQUEST_DAC1_CH1 |
l4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_CIRCULAR |
c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
DMA_PRIORITY_MEDIUM |
c0, l4, g4, g0, f4 |
HAL_DMA_PRIORITY_MEDIUM |
|
|
DMA_PRIORITY_HIGH |
c0, l4, g4, g0, f4 |
HAL_DMA_PRIORITY_HIGH |
|
|
DMA_PRIORITY_VERY_HIGH |
c0, l4, g4, g0, f4 |
HAL_DMA_PRIORITY_VERY_HIGH |
|
|
DMA_IT_TE |
c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
DMA_FLAG_GI1 |
c0, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TC1 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_HT1 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TE1 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_GI2 |
c0, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TC2 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_HT2 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_FLAG_TE2 |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
DMA_PRIORITY_LOW |
c0, l4, g4, g0, f4 |
HAL_DMA_PRIORITY_LOW |
|
|
DMA_REQUEST_DAC1_CH2 |
l4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM6_UP |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM7_UP |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM4_CH4 |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM4_UP |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM5_CH1 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM5_CH2 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM5_CH3 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM5_CH4 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM5_UP |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM5_TRIG |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM15_TRIG |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM15_COM |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DFSDM1_FLT0 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DFSDM1_FLT1 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM4_CH3 |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DCMI |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_AES_IN |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_AES_OUT |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_HASH_IN |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DFSDM1_FLT2 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DFSDM1_FLT3 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_GL1 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_GL2 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_GL3 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_GL4 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_GL5 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_GL6 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_FLAG_GL7 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DCMI_PSSI |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_DAC1_CHANNEL1 |
g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM4_CH2 |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM8_COM |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_SPI3_RX |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_SPI3_TX |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_I2C3_RX |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_I2C3_TX |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_I2C4_RX |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_I2C4_TX |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_UART4_RX |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_UART4_TX |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_UART5_RX |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_UART5_TX |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_LPUART1_RX |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_LPUART1_TX |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM4_CH1 |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_SAI1_A |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_SAI2_A |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_SAI2_B |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_OCTOSPI1 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_OCTOSPI2 |
l4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM1_TRIG |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM1_COM |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM8_CH1 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM8_CH2 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM8_CH3 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM8_CH4 |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM8_UP |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM8_TRIG |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_SAI1_B |
l4, g4 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_USART3_TX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_USART3_TX |
|
|
DMA_TRIGM_SINGLE_BURST_TRANSFER |
u5, h5 |
HAL_DMA_TRIGGER_SINGLE_BURST_TRANSFER |
|
|
GPDMA1_TRIGGER_EXTI_LINE1 |
u5, h5 |
HAL_GPDMA1_TRIGGER_EXTI1 |
|
|
GPDMA2_TRIGGER_GPDMA2_CH1_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA2_CH1_TC |
|
|
GPDMA2_TRIGGER_GPDMA2_CH2_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA2_CH2_TC |
|
|
GPDMA2_TRIGGER_GPDMA2_CH3_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA2_CH3_TC |
|
|
GPDMA2_TRIGGER_GPDMA2_CH4_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA2_CH4_TC |
|
|
GPDMA2_TRIGGER_GPDMA2_CH5_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA2_CH5_TC |
|
|
GPDMA2_TRIGGER_GPDMA2_CH6_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA2_CH6_TC |
|
|
GPDMA2_TRIGGER_GPDMA2_CH7_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA2_CH7_TC |
|
|
GPDMA2_TRIGGER_TIM2_TRGO |
h5 |
HAL_GPDMA2_TRIGGER_TIM2_TRGO |
|
|
GPDMA2_TRIGGER_TIM15_TRGO |
h5 |
HAL_GPDMA2_TRIGGER_TIM15_TRGO |
|
|
GPDMA2_TRIGGER_TIM12_TRGO |
h5 |
HAL_GPDMA2_TRIGGER_TIM12_TRGO |
|
|
GPDMA2_TRIGGER_LPTIM3_CH1 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM3_CH1 |
|
|
GPDMA2_TRIGGER_LPTIM3_CH2 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM3_CH2 |
|
|
GPDMA2_TRIGGER_LPTIM4_AIT |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM4_AIT |
|
|
GPDMA2_TRIGGER_LPTIM5_CH1 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM5_CH1 |
|
|
GPDMA2_TRIGGER_LPTIM5_CH2 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM5_CH2 |
|
|
GPDMA2_TRIGGER_LPTIM6_CH1 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM6_CH1 |
|
|
GPDMA2_TRIGGER_LPTIM6_CH2 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM6_CH2 |
|
|
GPDMA2_TRIGGER_COMP1_OUT |
h5 |
HAL_GPDMA2_TRIGGER_COMP1_OUT |
|
|
GPDMA2_TRIGGER_EVENTOUT |
h5 |
HAL_GPDMA2_TRIGGER_EVENTOUT |
|
|
HAL_DMAMUX1_SYNC_EXTI0 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI0 |
|
|
HAL_DMAMUX1_SYNC_EXTI1 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI1 |
|
|
HAL_DMAMUX1_SYNC_EXTI2 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI2 |
|
|
HAL_DMAMUX1_SYNC_EXTI3 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI3 |
|
|
HAL_DMAMUX1_SYNC_EXTI4 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI4 |
|
|
GPDMA2_TRIGGER_GPDMA2_CH0_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA2_CH0_TC |
|
|
GPDMA2_TRIGGER_GPDMA1_CH7_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA1_CH7_TC |
|
|
GPDMA2_TRIGGER_GPDMA1_CH6_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA1_CH6_TC |
|
|
GPDMA2_TRIGGER_GPDMA1_CH5_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA1_CH5_TC |
|
|
GPDMA1_TRIGGER_LPTIM6_CH1 |
h5 |
HAL_GPDMA1_TRIGGER_LPTIM6_CH1 |
|
|
GPDMA1_TRIGGER_LPTIM6_CH2 |
h5 |
HAL_GPDMA1_TRIGGER_LPTIM6_CH6 |
|
|
GPDMA1_TRIGGER_EVENTOUT |
h5 |
HAL_GPDMA1_TRIGGER_EVENTOUT |
|
|
GPDMA2_TRIGGER_EXTI_LINE0 |
h5 |
HAL_GPDMA2_TRIGGER_EXTI0 |
|
|
GPDMA2_TRIGGER_EXTI_LINE1 |
h5 |
HAL_GPDMA2_TRIGGER_EXTI1 |
|
|
GPDMA2_TRIGGER_EXTI_LINE2 |
h5 |
HAL_GPDMA2_TRIGGER_EXTI2 |
|
|
GPDMA2_TRIGGER_EXTI_LINE3 |
h5 |
HAL_GPDMA2_TRIGGER_EXTI3 |
|
|
GPDMA2_TRIGGER_EXTI_LINE4 |
h5 |
HAL_GPDMA2_TRIGGER_EXTI4 |
|
|
GPDMA2_TRIGGER_EXTI_LINE5 |
h5 |
HAL_GPDMA2_TRIGGER_EXTI5 |
|
|
GPDMA2_TRIGGER_EXTI_LINE6 |
h5 |
HAL_GPDMA2_TRIGGER_EXTI6 |
|
|
GPDMA2_TRIGGER_EXTI_LINE7 |
h5 |
HAL_GPDMA2_TRIGGER_EXTI7 |
|
|
GPDMA2_TRIGGER_TAMP_TRG1 |
h5 |
HAL_GPDMA2_TRIGGER_TAMP_TRG1 |
|
|
HAL_DMAMUX1_SYNC_EXTI5 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI5 |
|
|
GPDMA2_TRIGGER_TAMP_TRG2 |
h5 |
HAL_GPDMA2_TRIGGER_TAMP_TRG2 |
|
|
GPDMA2_TRIGGER_LPTIM1_CH1 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM1_CH1 |
|
|
GPDMA2_TRIGGER_LPTIM1_CH2 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM1_CH2 |
|
|
GPDMA2_TRIGGER_LPTIM2_CH1 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM2_CH1 |
|
|
GPDMA2_TRIGGER_LPTIM2_CH2 |
h5 |
HAL_GPDMA2_TRIGGER_LPTIM2_CH2 |
|
|
GPDMA2_TRIGGER_RTC_ALRA_TRG |
h5 |
HAL_GPDMA2_TRIGGER_RTC_ALRA_TRG |
|
|
GPDMA2_TRIGGER_RTC_ALRB_TRG |
h5 |
HAL_GPDMA2_TRIGGER_RTC_ALRB_TRG |
|
|
GPDMA2_TRIGGER_RTC_WUT_TRG |
h5 |
HAL_GPDMA2_TRIGGER_RTC_WUT_TRG |
|
|
GPDMA2_TRIGGER_GPDMA1_CH0_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA1_CH0_TC |
|
|
GPDMA2_TRIGGER_GPDMA1_CH1_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA1_CH1_TC |
|
|
GPDMA2_TRIGGER_GPDMA1_CH2_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA1_CH2_TC |
|
|
GPDMA2_TRIGGER_GPDMA1_CH3_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA1_CH3_TC |
|
|
GPDMA2_TRIGGER_GPDMA1_CH4_TCF |
h5 |
HAL_GPDMA2_TRIGGER_GPDMA1_CH3_TC |
|
|
GPDMA2_TRIGGER_TAMP_TRG3 |
h5 |
HAL_GPDMA1_TRIGGER_TAMP_TRG3 |
|
|
HAL_DMAMUX1_SYNC_EXTI6 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI6 |
|
|
HAL_DMAMUX1_SYNC_EXTI7 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI7 |
|
|
HAL_DMAMUX1_SYNC_EXTI8 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI8 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI14 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI14 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI15 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI15 |
|
|
HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_MUX_CH0_EVT |
|
|
HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_MUX_CH1_EVT |
|
|
HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_MUX_CH2_EVT |
|
|
HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_MUX_CH3_EVT |
|
|
HAL_DMAMUX1_REQ_GEN_TIM14_OC |
c0, g0 |
HAL_DMA1_DMAMUX1_REQGEN_TIM14_OC |
|
|
HAL_DMAMUX_REQ_GEN_NO_EVENT |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_REQGEN_MASKED |
|
|
HAL_DMAMUX_REQ_GEN_RISING |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_REQGEN_RISING |
|
|
HAL_DMAMUX_REQ_GEN_FALLING |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_REQGEN_FALLING |
|
|
HAL_DMAMUX_REQ_GEN_RISING_FALLING |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_REQGEN_RISING_FALLING |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI13 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI13 |
|
|
HAL_DMAMUX1_SYNC_LPTIM1_OUT |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_SYNC_DSI_TE |
l4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_SYNC_DSI_EOT |
l4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_SYNC_DMA2D_EOT |
l4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_SYNC_LDTC_IT |
l4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT |
l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT |
l4, g0 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_REQ_GEN_DSI_TE |
l4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_REQ_GEN_DSI_EOT |
l4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_REQ_GEN_DMA2D_EOT |
l4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_REQ_GEN_LTDC_IT |
l4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_SYNC_LPTIM2_OUT |
l4, g0 |
Not implemented yet in HAL2. |
|
|
GPDMA1_TRIGGER_LPTIM5_CH2 |
h5 |
HAL_GPDMA1_TRIGGER_LPTIM5_CH2 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI12 |
c0, l4, g4, g0 |
HAL_DMAMUX1_REQ_GEN_EXTI12 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI10 |
c0, l4, g4, g0 |
HAL_DMAMUX1_REQ_GEN_EXTI10 |
|
|
HAL_DMAMUX1_SYNC_EXTI9 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI9 |
|
|
HAL_DMAMUX1_SYNC_EXTI10 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI10 |
|
|
HAL_DMAMUX1_SYNC_EXTI11 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI11 |
|
|
HAL_DMAMUX1_SYNC_EXTI12 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI12 |
|
|
HAL_DMAMUX1_SYNC_EXTI13 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI13 |
|
|
HAL_DMAMUX1_SYNC_EXTI14 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI14 |
|
|
HAL_DMAMUX1_SYNC_EXTI15 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_EXTI15 |
|
|
HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_MUX_CH0_EVT |
|
|
HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_MUX_CH1_EVT |
|
|
HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_MUX_CH2_EVT |
|
|
HAL_DMAMUX1_SYNC_DMAMUX1_CH3_EVT |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_SYNC_MUX_CH3_EVT |
|
|
HAL_DMAMUX1_SYNC_TIM14_OC |
c0, g0 |
HAL_DMA1_DMAMUX1_SYNC_TIM14_OC |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI11 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI11 |
|
|
HAL_DMAMUX_SYNC_NO_EVENT |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_SYNC_MASKED |
|
|
HAL_DMAMUX_SYNC_FALLING |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_SYNC_FALLING |
|
|
HAL_DMAMUX_SYNC_RISING_FALLING |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_SYNC_RISING_FALLING |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI0 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI0 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI1 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI1 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI2 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI2 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI3 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI3 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI4 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI4 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI5 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI5 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI6 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI6 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI7 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI7 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI8 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI8 |
|
|
HAL_DMAMUX1_REQ_GEN_EXTI9 |
c0, l4, g4, g0 |
HAL_DMA1_DMAMUX1_REQGEN_EXTI9 |
|
|
HAL_DMAMUX_SYNC_RISING |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_SYNC_RISING |
|
|
GPDMA1_TRIGGER_EXTI_LINE0 |
u5, h5 |
HAL_GPDMA1_TRIGGER_EXTI0 |
|
|
GPDMA1_TRIGGER_LPTIM5_CH1 |
h5 |
HAL_GPDMA1_TRIGGER_LPTIM5_CH1 |
|
|
GPDMA1_TRIGGER_LPTIM3_CH2 |
h5 |
HAL_GPDMA1_TRIGGER_LPTIM3_CH2 |
|
|
GPDMA1_TRIGGER_GPDMA1_CH11_TCF |
u5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH11_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH12_TCF |
u5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH12_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH13_TCF |
u5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH13_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH14_TCF |
u5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH14_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH15_TCF |
u5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH15_TC |
|
|
GPDMA1_TRIGGER_LPDMA1_CH0_TCF |
u5 |
HAL_LPDMA1_TRIGGER_LPDMA1_CH0_TC |
|
|
GPDMA1_TRIGGER_LPDMA1_CH1_TCF |
u5 |
HAL_LPDMA1_TRIGGER_LPDMA1_CH1_TC |
|
|
GPDMA1_TRIGGER_LPDMA1_CH2_TCF |
u5 |
HAL_LPDMA1_TRIGGER_LPDMA1_CH2_TC |
|
|
GPDMA1_TRIGGER_LPDMA1_CH3_TCF |
u5 |
HAL_LPDMA1_TRIGGER_LPDMA1_CH3_TC |
|
|
GPDMA1_TRIGGER_TIM2_TRGO |
u5, h5 |
HAL_GPDMA1_TRIGGER_TIM2_TRGO |
|
|
GPDMA1_TRIGGER_TIM15_TRGO |
u5, h5 |
HAL_GPDMA1_TRIGGER_TIM15_TRGO |
|
|
GPDMA1_TRIGGER_TIM3_TRGO |
u5 |
HAL_GPDMA1_TRIGGER_TIM3_TRGO |
|
|
GPDMA1_TRIGGER_TIM4_TRGO |
u5 |
HAL_GPDMA1_TRIGGER_TIM4_TRGO |
|
|
GPDMA1_TRIGGER_TIM5_TRGO |
u5 |
HAL_GPDMA1_TRIGGER_TIM5_TRGO |
|
|
GPDMA1_TRIGGER_LTDC_LI |
u5 |
HAL_GPDMA1_TRIGGER_LTDC_LI |
|
|
GPDMA1_TRIGGER_DSI_TE |
u5 |
HAL_GPDMA1_TRIGGER_DSI_TE |
|
|
GPDMA1_TRIGGER_DSI_ER |
u5 |
HAL_GPDMA1_TRIGGER_DSI_ER |
|
|
GPDMA1_TRIGGER_DMA2D_TC |
u5 |
HAL_GPDMA1_TRIGGER_DMA2D_TC |
|
|
GPDMA1_TRIGGER_DMA2D_CTC |
u5 |
HAL_GPDMA1_TRIGGER_DMA2D_CTC |
|
|
GPDMA1_TRIGGER_DMA2D_TW |
u5 |
HAL_GPDMA1_TRIGGER_DMA2D_TW |
|
|
GPDMA1_TRIGGER_GPU2D_FLAG0 |
u5 |
HAL_GPDMA1_TRIGGER_GPU2D_FLAG0 |
|
|
GPDMA1_TRIGGER_GPU2D_FLAG1 |
u5 |
HAL_GPDMA1_TRIGGER_GPU2D_FLAG1 |
|
|
GPDMA1_TRIGGER_GPU2D_FLAG2 |
u5 |
HAL_GPDMA1_TRIGGER_GPU2D_FLAG2 |
|
|
GPDMA1_TRIGGER_GPU2D_FLAG3 |
u5 |
HAL_GPDMA1_TRIGGER_GPU2D_FLAG3 |
|
|
GPDMA1_TRIGGER_ADC4_AWD1 |
u5 |
HAL_GPDMA1_TRIGGER_ADC4_AWD1 |
|
|
GPDMA1_TRIGGER_GPDMA1_CH10_TCF |
u5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH10_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH9_TCF |
u5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH9_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH8_TCF |
u5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH8_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH7_TCF |
u5, h5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH7_TC |
|
|
GPDMA1_TRIGGER_EXTI_LINE2 |
u5, h5 |
HAL_GPDMA1_TRIGGER_EXTI2 |
|
|
GPDMA1_TRIGGER_EXTI_LINE3 |
u5, h5 |
HAL_GPDMA1_TRIGGER_EXTI3 |
|
|
GPDMA1_TRIGGER_EXTI_LINE4 |
u5, h5 |
HAL_GPDMA1_TRIGGER_EXTI4 |
|
|
GPDMA1_TRIGGER_EXTI_LINE5 |
u5, h5 |
HAL_GPDMA1_TRIGGER_EXTI5 |
|
|
GPDMA1_TRIGGER_EXTI_LINE6 |
u5, h5 |
HAL_GPDMA1_TRIGGER_EXTI6 |
|
|
GPDMA1_TRIGGER_EXTI_LINE7 |
u5, h5 |
HAL_GPDMA1_TRIGGER_EXTI7 |
|
|
GPDMA1_TRIGGER_TAMP_TRG1 |
u5, h5 |
HAL_GPDMA1_TRIGGER_TAMP_TRG1 |
|
|
GPDMA1_TRIGGER_TAMP_TRG2 |
u5, h5 |
HAL_GPDMA1_TRIGGER_TAMP_TRG2 |
|
|
GPDMA1_TRIGGER_TAMP_TRG3 |
u5, h5 |
HAL_GPDMA1_TRIGGER_TAMP_TRG3 |
|
|
GPDMA1_TRIGGER_LPTIM1_CH1 |
u5, h5 |
HAL_GPDMA1_TRIGGER_LPTIM1_CH1 |
|
|
GPDMA1_TRIGGER_LPTIM1_CH2 |
u5, h5 |
HAL_GPDMA1_TRIGGER_LPTIM1_CH2 |
|
|
GPDMA1_TRIGGER_LPTIM2_CH1 |
u5, h5 |
HAL_GPDMA1_TRIGGER_LPTIM2_CH1 |
|
|
GPDMA1_TRIGGER_ADC1_AWD1 |
u5 |
HAL_GPDMA1_TRIGGER_ADC1_AWD1 |
|
|
GPDMA1_TRIGGER_LPTIM2_CH2 |
u5, h5 |
HAL_GPDMA1_TRIGGER_LPTIM2_CH2 |
|
|
GPDMA1_TRIGGER_COMP1_OUT |
u5, h5 |
HAL_GPDMA1_TRIGGER_COMP1_OUT |
|
|
GPDMA1_TRIGGER_COMP2_OUT |
u5 |
HAL_GPDMA1_TRIGGER_COMP2_OUT |
|
|
GPDMA1_TRIGGER_RTC_ALRA_TRG |
u5, h5 |
HAL_GPDMA1_TRIGGER_RTC_ALRA_TRG |
|
|
GPDMA1_TRIGGER_RTC_ALRB_TRG |
u5, h5 |
HAL_GPDMA1_TRIGGER_RTC_ALRB_TRG |
|
|
GPDMA1_TRIGGER_RTC_WUT_TRG |
u5, h5 |
HAL_GPDMA1_TRIGGER_RTC_WUT_TRG |
|
|
GPDMA1_TRIGGER_GPDMA1_CH0_TCF |
u5, h5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH0_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH1_TCF |
u5, h5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH1_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH2_TCF |
u5, h5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH2_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH3_TCF |
u5, h5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH3_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH4_TCF |
u5, h5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH4_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH5_TCF |
u5, h5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH5_TC |
|
|
GPDMA1_TRIGGER_GPDMA1_CH6_TCF |
u5, h5 |
HAL_GPDMA1_TRIGGER_GPDMA1_CH6_TC |
|
|
GPDMA1_TRIGGER_LPTIM4_OUT |
u5 |
HAL_GPDMA1_TRIGGER_LPTIM4_OUT |
|
|
GPDMA1_TRIGGER_GFXTIM_EVT3 |
u5 |
HAL_GPDMA1_TRIGGER_GFXTIM_EVT4 |
|
|
GPDMA1_TRIGGER_GFXTIM_EVT2 |
u5 |
HAL_GPDMA1_TRIGGER_GFXTIM_EVT3 |
|
|
GPDMA1_TRIGGER_GFXTIM_EVT1 |
u5 |
HAL_GPDMA1_TRIGGER_GFXTIM_EVT2 |
|
|
LPDMA1_TRIGGER_GPDMA1_CH4_TCF |
u5 |
HAL_LPDMA1_TRIGGER_GPDMA1_CH4_TC |
|
|
LPDMA1_TRIGGER_GPDMA1_CH5_TCF |
u5 |
HAL_LPDMA1_TRIGGER_GPDMA1_CH5_TC |
|
|
LPDMA1_TRIGGER_GPDMA1_CH6_TCF |
u5 |
HAL_LPDMA1_TRIGGER_GPDMA1_CH6_TC |
|
|
LPDMA1_TRIGGER_GPDMA1_CH7_TCF |
u5 |
HAL_LPDMA1_TRIGGER_GPDMA1_CH7_TC |
|
|
LPDMA1_TRIGGER_GPDMA1_CH12_TCF |
u5 |
HAL_LPDMA1_TRIGGER_GPDMA1_CH12_TC |
|
|
LPDMA1_TRIGGER_GPDMA1_CH13_TCF |
u5 |
HAL_LPDMA1_TRIGGER_GPDMA1_CH13_TC |
|
|
LPDMA1_TRIGGER_TIM2_TRGO |
u5 |
HAL_LPDMA1_TRIGGER_TIM2_TRGO |
|
|
LPDMA1_TRIGGER_TIM15_TRGO |
u5 |
HAL_LPDMA1_TRIGGER_TIM15_TRGO |
|
|
DMA_LPDMA_LINEAR_NODE |
u5 |
HAL_DMA_NODE_LINEAR_ADDRESSING |
Refer to |
|
DMA_GPDMA_LINEAR_NODE |
u5, h5 |
HAL_DMA_NODE_LINEAR_ADDRESSING |
Refer to |
|
DMA_GPDMA_2D_NODE |
u5, h5 |
HAL_DMA_NODE_2D_ADDRESSING |
Refer to |
|
DMA_LINK_ALLOCATED_PORT0 |
u5, h5 |
HAL_DMA_PORT0 |
|
|
LPDMA1_TRIGGER_GPDMA1_CH1_TCF |
u5 |
HAL_LPDMA1_TRIGGER_GPDMA1_CH1_TC |
|
|
DMA_LINK_ALLOCATED_PORT1 |
u5, h5 |
HAL_DMA_PORT1 |
|
|
DMA_LSM_1LINK_EXECUTION |
u5, h5 |
HAL_DMA_LINKEDLIST_EXECUTION_NODE |
|
|
GPDMA1_TRIGGER_GPDMA2_CH0_TCF |
h5 |
HAL_GPDMA1_TRIGGER_GPDMA2_CH0_TC |
|
|
GPDMA1_TRIGGER_GPDMA2_CH1_TCF |
h5 |
HAL_GPDMA1_TRIGGER_GPDMA2_CH1_TC |
|
|
GPDMA1_TRIGGER_GPDMA2_CH2_TCF |
h5 |
HAL_GPDMA1_TRIGGER_GPDMA2_CH2_TC |
|
|
GPDMA1_TRIGGER_GPDMA2_CH3_TCF |
h5 |
HAL_GPDMA1_TRIGGER_GPDMA2_CH3_TC |
|
|
GPDMA1_TRIGGER_GPDMA2_CH4_TCF |
h5 |
HAL_GPDMA1_TRIGGER_GPDMA2_CH4_TC |
|
|
GPDMA1_TRIGGER_GPDMA2_CH5_TCF |
h5 |
HAL_GPDMA1_TRIGGER_GPDMA2_CH5_TC |
|
|
GPDMA1_TRIGGER_GPDMA2_CH6_TCF |
h5 |
HAL_GPDMA1_TRIGGER_GPDMA2_CH6_TC |
|
|
GPDMA1_TRIGGER_GPDMA2_CH7_TCF |
h5 |
HAL_GPDMA1_TRIGGER_GPDMA2_CH7_TC |
|
|
GPDMA1_TRIGGER_TIM12_TRGO |
h5 |
HAL_GPDMA1_TRIGGER_TIM12_TRGO |
|
|
GPDMA1_TRIGGER_LPTIM3_CH1 |
h5 |
HAL_GPDMA1_TRIGGER_LPTIM3_TRGO |
|
|
DMA_LSM_FULL_EXECUTION |
u5, h5 |
HAL_DMA_LINKEDLIST_EXECUTION_Q |
|
|
GPDMA1_TRIGGER_LPTIM4_AIT |
h5 |
HAL_GPDMA1_TRIGGER_LPTIM4_AIT |
|
|
LPDMA1_TRIGGER_GPDMA1_CH0_TCF |
u5 |
HAL_LPDMA1_TRIGGER_GPDMA1_CH0_TC |
|
|
LPDMA1_TRIGGER_LPDMA1_CH2_TCF |
u5 |
HAL_LPDMA1_TRIGGER_LPDMA1_CH2_TC |
|
|
GPDMA1_TRIGGER_GFXTIM_EVT0 |
u5 |
HAL_GPDMA1_TRIGGER_GFXTIM_EVT1 |
|
|
GPDMA1_TRIGGER_JPEG_EOC |
u5 |
HAL_GPDMA1_TRIGGER_JPEG_EOC_TRG |
|
|
GPDMA1_TRIGGER_JPEG_IFNF |
u5 |
HAL_GPDMA1_TRIGGER_JPEG_IFNF_TRG |
|
|
GPDMA1_TRIGGER_JPEG_IFT |
u5 |
HAL_GPDMA1_TRIGGER_JPEG_IFT_TRG |
|
|
GPDMA1_TRIGGER_JPEG_OFNE |
u5 |
HAL_GPDMA1_TRIGGER_JPEG_OFNE_TRG |
|
|
GPDMA1_TRIGGER_JPEG_OFT |
u5 |
HAL_GPDMA1_TRIGGER_JPEG_OFT_TRG |
|
|
LPDMA1_TRIGGER_EXTI_LINE0 |
u5 |
HAL_LPDMA1_TRIGGER_EXTI0 |
|
|
LPDMA1_TRIGGER_EXTI_LINE1 |
u5 |
HAL_LPDMA1_TRIGGER_EXTI1 |
|
|
LPDMA1_TRIGGER_EXTI_LINE2 |
u5 |
HAL_LPDMA1_TRIGGER_EXTI2 |
|
|
LPDMA1_TRIGGER_EXTI_LINE3 |
u5 |
HAL_LPDMA1_TRIGGER_EXTI3 |
|
|
LPDMA1_TRIGGER_EXTI_LINE4 |
u5 |
HAL_LPDMA1_TRIGGER_EXTI4 |
|
|
LPDMA1_TRIGGER_TAMP_TRG1 |
u5 |
HAL_LPDMA1_TRIGGER_TAMP_TRG1 |
|
|
LPDMA1_TRIGGER_LPDMA1_CH3_TCF |
u5 |
HAL_LPDMA1_TRIGGER_LPDMA1_CH3_TC |
|
|
LPDMA1_TRIGGER_TAMP_TRG2 |
u5 |
HAL_LPDMA1_TRIGGER_TAMP_TRG2 |
|
|
LPDMA1_TRIGGER_LPTIM1_CH1 |
u5 |
HAL_LPDMA1_TRIGGER_LPTIM1_CH1 |
|
|
LPDMA1_TRIGGER_LPTIM1_CH2 |
u5 |
HAL_LPDMA1_TRIGGER_LPTIM1_CH2 |
|
|
LPDMA1_TRIGGER_LPTIM3_CH1 |
u5 |
HAL_LPDMA1_TRIGGER_LPTIM3_CH1 |
|
|
LPDMA1_TRIGGER_LPTIM4_OUT |
u5 |
HAL_LPDMA1_TRIGGER_LPTIM4_OUT |
|
|
LPDMA1_TRIGGER_COMP1_OUT |
u5 |
HAL_LPDMA1_TRIGGER_COMP1_OUT |
|
|
LPDMA1_TRIGGER_COMP2_OUT |
u5 |
HAL_LPDMA1_TRIGGER_COMP2_OUT |
|
|
LPDMA1_TRIGGER_RTC_ALRA_TRG |
u5 |
HAL_LPDMA1_TRIGGER_RTC_ALRA_TRG |
|
|
LPDMA1_TRIGGER_RTC_ALRB_TRG |
u5 |
HAL_LPDMA1_TRIGGER_RTC_ALRB_TRG |
|
|
LPDMA1_TRIGGER_RTC_WUT_TRG |
u5 |
HAL_LPDMA1_TRIGGER_RTC_WUT_TRG |
|
|
LPDMA1_TRIGGER_ADC4_AWD1 |
u5 |
HAL_LPDMA1_TRIGGER_ADC4_AWD1 |
|
|
LPDMA1_TRIGGER_LPDMA1_CH0_TCF |
u5 |
HAL_LPDMA1_TRIGGER_LPDMA1_CH0_TC |
|
|
LPDMA1_TRIGGER_LPDMA1_CH1_TCF |
u5 |
HAL_LPDMA1_TRIGGER_LPDMA1_CH1_TC |
|
|
LPDMA1_TRIGGER_TAMP_TRG3 |
u5 |
HAL_LPDMA1_TRIGGER_TAMP_TRG3 |
|
|
DMA_REQUEST_USART3_RX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_USART3_RX |
|
|
DMA_FLAG_GI6 |
c0, g0 |
Removed / New Usage changes |
|
|
DMA_REQUEST_USART2_RX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_USART2_RX |
|
|
DMA_TCEM_EACH_LL_ITEM_TRANSFER |
u5, h5 |
HAL_DMA_LINKEDLIST_XFER_EVENT_NODE |
|
|
DMA_TCEM_LAST_LL_ITEM_TRANSFER |
u5, h5 |
HAL_DMA_LINKEDLIST_XFER_EVENT_Q |
|
|
DMA_NORMAL |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_XFER_MODE_DIRECT |
|
|
DMA_CHANNEL_PRIV |
u5, h5 |
HAL_DMA_PRIV |
|
|
DMA_CHANNEL_NPRIV |
u5, h5 |
HAL_DMA_NPRIV |
|
|
DMA_CHANNEL_SEC |
u5, h5 |
HAL_DMA_SEC |
|
|
DMA_CHANNEL_NSEC |
u5, h5 |
HAL_DMA_NSEC |
|
|
DMA_CHANNEL_SRC_SEC |
u5, h5 |
HAL_DMA_SEC_ITEM_SRC |
|
|
DMA_CHANNEL_SRC_NSEC |
u5, h5 |
HAL_DMA_SEC_ITEM_DEST |
|
|
DMA_CHANNEL_DEST_SEC |
u5, h5 |
HAL_DMA_SEC_ITEM_DEST |
|
|
DMA_CHANNEL_DEST_NSEC |
u5, h5 |
HAL_DMA_SEC_ITEM_SRC |
|
|
DMA_CHANNEL_ATTRIBUTE_UNLOCKED |
u5, h5 |
HAL_DMA_UNLOCKED |
|
|
DMA_CHANNEL_ATTRIBUTE_LOCKED |
u5, h5 |
HAL_DMA_LOCKED |
|
|
GPDMA1_REQUEST_UART4_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_UART4_TX |
|
|
GPDMA1_REQUEST_UART4_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_UART4_RX |
|
|
DMA_REQUEST_USART2_TX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_USART2_TX |
|
|
GPDMA1_REQUEST_USART3_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_USART3_TX |
|
|
GPDMA1_REQUEST_USART3_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_USART3_RX |
|
|
GPDMA1_REQUEST_USART2_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_USART2_TX |
|
|
GPDMA1_REQUEST_USART2_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_USART2_RX |
|
|
GPDMA1_REQUEST_USART1_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_USART1_TX |
|
|
GPDMA1_REQUEST_USART1_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_USART1_RX |
|
|
GPDMA1_REQUEST_I2C4_EVC |
u5 |
HAL_GPDMA1_REQUEST_I2C4_EVC |
|
|
DMA_TCEM_REPEATED_BLOCK_TRANSFER |
u5, h5 |
Removed / New Usage changes |
|
|
GPDMA1_REQUEST_I2C4_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_I2C4_TX |
|
|
DMA_TCEM_BLOCK_TRANSFER |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_DEST_ALLOCATED_PORT0 |
u5, h5 |
HAL_DMA_PORT0 |
|
|
LPDMA1_REQUEST_LPTIM3_UE |
u5 |
HAL_LPDMA1_REQUEST_LPTIM3_UE |
|
|
DMA_REQUEST_SW |
u5, h5 |
HAL_DMA_DIRECTION_MEMORY_TO_MEMORY |
|
|
DMA_BREQ_SINGLE_BURST |
u5, h5 |
HAL_DMA_HARDWARE_REQUEST_BURST |
|
|
DMA_BREQ_BLOCK |
u5, h5 |
HAL_DMA_HARDWARE_REQUEST_BLOCK |
|
|
DMA_PERIPH_TO_MEMORY |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_DIRECTION_PERIPH_TO_MEMORY |
|
|
DMA_MEMORY_TO_PERIPH |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_DIRECTION_MEMORY_TO_PERIPH |
|
|
DMA_MEMORY_TO_MEMORY |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_DIRECTION_MEMORY_TO_MEMORY |
|
|
DMA_SINC_FIXED |
u5, h5 |
HAL_DMA_SRC_ADDR_FIXED |
|
|
DMA_SINC_INCREMENTED |
u5, h5 |
HAL_DMA_SRC_ADDR_INCREMENTED |
|
|
DMA_DINC_FIXED |
u5, h5 |
HAL_DMA_DEST_ADDR_FIXED |
|
|
DMA_DINC_INCREMENTED |
u5, h5 |
HAL_DMA_DEST_ADDR_INCREMENTED |
|
|
DMA_SRC_DATAWIDTH_BYTE |
u5, h5 |
HAL_DMA_SRC_DATA_WIDTH_BYTE |
|
|
DMA_SRC_DATAWIDTH_HALFWORD |
u5, h5 |
HAL_DMA_SRC_DATA_WIDTH_HALFWORD |
|
|
DMA_SRC_DATAWIDTH_WORD |
u5, h5 |
HAL_DMA_SRC_DATA_WIDTH_WORD |
|
|
DMA_DEST_DATAWIDTH_BYTE |
u5, h5 |
HAL_DMA_DEST_DATA_WIDTH_BYTE |
|
|
DMA_DEST_DATAWIDTH_HALFWORD |
u5, h5 |
HAL_DMA_DEST_DATA_WIDTH_HALFWORD |
|
|
DMA_DEST_DATAWIDTH_WORD |
u5, h5 |
HAL_DMA_DEST_DATA_WIDTH_WORD |
|
|
DMA_LOW_PRIORITY_LOW_WEIGHT |
u5, h5 |
HAL_DMA_PRIORITY_LOW_WEIGHT_LOW |
|
|
DMA_LOW_PRIORITY_MID_WEIGHT |
u5, h5 |
HAL_DMA_PRIORITY_LOW_WEIGHT_MID |
|
|
DMA_LOW_PRIORITY_HIGH_WEIGHT |
u5, h5 |
HAL_DMA_PRIORITY_LOW_WEIGHT_HIGH |
|
|
DMA_HIGH_PRIORITY |
u5, h5 |
HAL_DMA_PRIORITY_HIGH |
|
|
DMA_SRC_ALLOCATED_PORT0 |
u5, h5 |
HAL_DMA_PORT0 |
|
|
DMA_SRC_ALLOCATED_PORT1 |
u5, h5 |
HAL_DMA_PORT1 |
|
|
DMA_DEST_ALLOCATED_PORT1 |
u5, h5 |
HAL_DMA_PORT1 |
|
|
LPDMA1_REQUEST_LPTIM3_IC2 |
u5 |
HAL_LPDMA1_REQUEST_LPTIM3_IC2 |
|
|
GPDMA1_REQUEST_I2C4_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_I2C4_RX |
|
|
GPDMA1_REQUEST_I2C3_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_I2C3_TX |
|
|
GPDMA1_REQUEST_ADC1 |
u5, h5 |
HAL_GPDMA1_REQUEST_ADC1 |
|
|
DMA_FLAG_TO |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_FLAG_SUSP |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_FLAG_USE |
u5, h5 |
Removed / New Usage changes |
|
|
GPDMA1_REQUEST_USART11_RX |
h5 |
HAL_GPDMA1_REQUEST_USART11_RX |
|
|
DMA_FLAG_ULE |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_FLAG_DTE |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_FLAG_HT |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_FLAG_TC |
u5, h5 |
Removed / New Usage changes |
|
|
GPDMA1_REQUEST_USART11_TX |
h5 |
HAL_GPDMA1_REQUEST_USART11_TX |
|
|
GPDMA1_REQUEST_UART12_RX |
h5 |
HAL_GPDMA1_REQUEST_USART12_RX |
|
|
GPDMA1_REQUEST_UART12_TX |
h5 |
HAL_GPDMA1_REQUEST_USART12_TX |
|
|
GPDMA1_REQUEST_SPI4_RX |
h5 |
HAL_GPDMA1_REQUEST_SPI4_RX |
|
|
GPDMA1_REQUEST_SPI4_TX |
h5 |
HAL_GPDMA1_REQUEST_SPI4_TX |
|
|
GPDMA1_REQUEST_SPI5_RX |
h5 |
HAL_GPDMA1_REQUEST_SPI5_RX |
|
|
GPDMA1_REQUEST_SPI5_TX |
h5 |
HAL_GPDMA1_REQUEST_SPI5_TX |
|
|
GPDMA1_REQUEST_SPI6_RX |
h5 |
HAL_GPDMA1_REQUEST_SPI6_RX |
|
|
GPDMA1_REQUEST_SPI6_TX |
h5 |
HAL_GPDMA1_REQUEST_SPI6_TX |
|
|
GPDMA1_REQUEST_DCMI |
h5 |
HAL_GPDMA1_REQUEST_DCMI |
|
|
GPDMA1_REQUEST_I3C1_RX |
h5 |
HAL_GPDMA1_REQUEST_I3C1_RX |
|
|
GPDMA1_REQUEST_I3C1_TX |
h5 |
HAL_GPDMA1_REQUEST_I3C1_TX |
|
|
GPDMA1_REQUEST_I3C1_TC |
h5 |
HAL_GPDMA1_REQUEST_I3C1_TC |
|
|
GPDMA1_REQUEST_I3C1_RS |
h5 |
HAL_GPDMA1_REQUEST_I3C1_RS |
|
|
GPDMA1_REQUEST_ADC4 |
u5 |
HAL_GPDMA1_REQUEST_ADC4 |
|
|
GPDMA1_REQUEST_I2C3_EVC |
u5 |
HAL_GPDMA1_REQUEST_I2C3_EVC |
|
|
GPDMA1_REQUEST_DAC1_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_DAC1_CH1 |
|
|
GPDMA1_REQUEST_TIM6_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM6_UPD |
|
|
GPDMA1_REQUEST_I2C3_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_I2C3_RX |
|
|
GPDMA1_REQUEST_I2C2_EVC |
u5 |
HAL_GPDMA1_REQUEST_I2C2_EVC |
|
|
GPDMA1_REQUEST_I2C2_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_I2C2_TX |
|
|
GPDMA1_REQUEST_I2C2_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_I2C2_RX |
|
|
GPDMA1_REQUEST_I2C1_EVC |
u5 |
HAL_GPDMA1_REQUEST_I2C1_EVC |
|
|
GPDMA1_REQUEST_I2C1_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_I2C1_TX |
|
|
GPDMA1_REQUEST_I2C1_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_I2C1_RX |
|
|
GPDMA1_REQUEST_SPI3_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_SPI3_TX |
|
|
GPDMA1_REQUEST_SPI3_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_SPI3_RX |
|
|
GPDMA1_REQUEST_SPI2_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_SPI2_TX |
|
|
GPDMA1_REQUEST_SPI2_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_SPI2_RX |
|
|
GPDMA1_REQUEST_SPI1_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_SPI1_TX |
|
|
GPDMA1_REQUEST_UART7_RX |
h5 |
HAL_GPDMA1_REQUEST_UART7_RX |
|
|
GPDMA1_REQUEST_UART7_TX |
h5 |
HAL_GPDMA1_REQUEST_UART7_TX |
|
|
GPDMA1_REQUEST_UART8_RX |
h5 |
HAL_GPDMA1_REQUEST_UART8_RX |
|
|
GPDMA1_REQUEST_UART8_TX |
h5 |
HAL_GPDMA1_REQUEST_UART8_TX |
|
|
GPDMA1_REQUEST_UART9_RX |
h5 |
HAL_GPDMA1_REQUEST_UART9_RX |
|
|
GPDMA1_REQUEST_UART9_TX |
h5 |
HAL_GPDMA1_REQUEST_UART9_TX |
|
|
GPDMA1_REQUEST_USART10_RX |
h5 |
HAL_GPDMA1_REQUEST_USART10_RX |
|
|
GPDMA1_REQUEST_USART10_TX |
h5 |
HAL_GPDMA1_REQUEST_USART10_TX |
|
|
GPDMA1_REQUEST_SPI1_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_SPI1_RX |
|
|
GPDMA1_REQUEST_TIM7_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM7_UPD |
|
|
GPDMA1_REQUEST_DAC1_CH2 |
u5, h5 |
HAL_GPDMA1_REQUEST_DAC1_CH2 |
|
|
GPDMA1_REQUEST_LPTIM5_IC1 |
h5 |
HAL_GPDMA1_REQUEST_LPTIM5_IC1 |
|
|
LPDMA1_REQUEST_LPTIM3_IC1 |
u5 |
HAL_LPDMA1_REQUEST_LPTIM3_IC1 |
|
|
LPDMA1_REQUEST_LPTIM1_IC2 |
u5 |
HAL_LPDMA1_REQUEST_LPTIM1_IC2 |
|
|
GPDMA1_REQUEST_TIM8_COM |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM8_COM |
|
|
GPDMA1_REQUEST_TIM8_TRIG |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM8_TRGI |
|
|
GPDMA1_REQUEST_TIM8_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM8_UPD |
|
|
GPDMA1_REQUEST_TIM8_CH4 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM8_CH4 |
|
|
GPDMA1_REQUEST_TIM8_CH3 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM8_CH3 |
|
|
GPDMA1_REQUEST_TIM8_CH2 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM8_CH2 |
|
|
GPDMA1_REQUEST_TIM8_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM8_CH1 |
|
|
GPDMA1_REQUEST_TIM1_COM |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM1_COM |
|
|
GPDMA1_REQUEST_TIM1_TRIG |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM1_TRGI |
|
|
GPDMA1_REQUEST_TIM1_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM1_UPD |
|
|
GPDMA1_REQUEST_TIM1_CH4 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM1_CH4 |
|
|
GPDMA1_REQUEST_TIM1_CH3 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM1_CH3 |
|
|
GPDMA1_REQUEST_TIM1_CH2 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM1_CH2 |
|
|
GPDMA1_REQUEST_TIM1_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM1_CH1 |
|
|
GPDMA1_REQUEST_OCTOSPI2 |
u5 |
HAL_GPDMA1_REQUEST_OCTOSPI2 |
|
|
GPDMA1_REQUEST_OCTOSPI1 |
u5, h5 |
HAL_GPDMA1_REQUEST_OCTOSPI1 |
|
|
GPDMA1_REQUEST_SAI2_B |
u5, h5 |
HAL_GPDMA1_REQUEST_SAI2_B |
|
|
GPDMA1_REQUEST_SAI2_A |
u5, h5 |
HAL_GPDMA1_REQUEST_SAI2_A |
|
|
GPDMA1_REQUEST_SAI1_B |
u5, h5 |
HAL_GPDMA1_REQUEST_SAI1_B |
|
|
GPDMA1_REQUEST_SAI1_A |
u5, h5 |
HAL_GPDMA1_REQUEST_SAI1_A |
|
|
GPDMA1_REQUEST_LPUART1_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_LPUART1_TX |
|
|
GPDMA1_REQUEST_LPUART1_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_LPUART1_RX |
|
|
GPDMA1_REQUEST_UART5_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_UART5_TX |
|
|
GPDMA1_REQUEST_TIM2_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM2_CH1 |
|
|
GPDMA1_REQUEST_UART5_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_UART5_RX |
|
|
GPDMA1_REQUEST_TIM2_CH2 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM2_CH2 |
|
|
GPDMA1_REQUEST_TIM2_CH4 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM2_CH4 |
|
|
GPDMA1_REQUEST_TIM4_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM4_CH1 |
|
|
GPDMA1_REQUEST_TIM4_CH2 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM4_CH2 |
|
|
GPDMA1_REQUEST_TIM4_CH3 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM4_CH3 |
|
|
GPDMA1_REQUEST_TIM4_CH4 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM4_CH4 |
|
|
GPDMA1_REQUEST_TIM4_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM4_UPD |
|
|
GPDMA1_REQUEST_TIM5_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM5_CH1 |
|
|
GPDMA1_REQUEST_TIM5_CH2 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM5_CH2 |
|
|
GPDMA1_REQUEST_TIM5_CH3 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM5_CH3 |
|
|
GPDMA1_REQUEST_TIM5_CH4 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM5_CH4 |
|
|
GPDMA1_REQUEST_TIM5_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM5_UPD |
|
|
GPDMA1_REQUEST_TIM5_TRIG |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM5_TRGI |
|
|
GPDMA1_REQUEST_TIM15_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM15_CH1 |
|
|
GPDMA1_REQUEST_TIM15_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM15_UPD |
|
|
GPDMA1_REQUEST_TIM15_TRIG |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM15_TRGI |
|
|
GPDMA1_REQUEST_TIM15_COM |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM15_COM |
|
|
GPDMA1_REQUEST_TIM16_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM16_CH1 |
|
|
GPDMA1_REQUEST_TIM16_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM16_UPD |
|
|
GPDMA1_REQUEST_TIM17_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM17_CH1 |
|
|
GPDMA1_REQUEST_TIM3_CH4 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM3_CH4 |
|
|
GPDMA1_REQUEST_TIM3_CH3 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM3_CH3 |
|
|
GPDMA1_REQUEST_TIM3_CH2 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM3_CH2 |
|
|
GPDMA1_REQUEST_TIM3_CH1 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM3_CH1 |
|
|
GPDMA1_REQUEST_TIM2_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM2_UPD |
|
|
GPDMA1_REQUEST_TIM2_CH3 |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM2_CH3 |
|
|
LPDMA1_REQUEST_LPTIM1_UE |
u5 |
HAL_LPDMA1_REQUEST_LPTIM1_UE |
|
|
GPDMA1_REQUEST_TIM17_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM17_UPD |
|
|
GPDMA1_REQUEST_AES_IN |
u5, h5 |
HAL_GPDMA1_REQUEST_AES_IN |
|
|
GPDMA1_REQUEST_I2C5_RX |
u5 |
HAL_GPDMA1_REQUEST_I2C5_RX |
|
|
GPDMA1_REQUEST_I2C5_TX |
u5 |
HAL_GPDMA1_REQUEST_I2C5_TX |
|
|
GPDMA1_REQUEST_I2C5_EVC |
u5 |
HAL_GPDMA1_REQUEST_I2C5_EVC |
|
|
GPDMA1_REQUEST_I2C6_RX |
u5 |
HAL_GPDMA1_REQUEST_I2C6_RX |
|
|
GPDMA1_REQUEST_I2C6_TX |
u5 |
HAL_GPDMA1_REQUEST_I2C6_TX |
|
|
GPDMA1_REQUEST_I2C6_EVC |
u5 |
HAL_GPDMA1_REQUEST_I2C6_EVC |
|
|
GPDMA1_REQUEST_USART6_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_USART6_RX |
|
|
GPDMA1_REQUEST_USART6_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_USART6_TX |
|
|
GPDMA1_REQUEST_ADC2 |
u5, h5 |
HAL_GPDMA1_REQUEST_ADC2 |
|
|
GPDMA1_REQUEST_JPEG_RX |
u5 |
HAL_GPDMA1_REQUEST_JPEG_RX |
|
|
GPDMA1_REQUEST_JPEG_TX |
u5 |
HAL_GPDMA1_REQUEST_JPEG_TX |
|
|
LPDMA1_REQUEST_LPUART1_RX |
u5 |
HAL_LPDMA1_REQUEST_LPUART1_RX |
|
|
LPDMA1_REQUEST_LPUART1_TX |
u5 |
HAL_LPDMA1_REQUEST_LPUART1_TX |
|
|
LPDMA1_REQUEST_SPI3_RX |
u5 |
HAL_LPDMA1_REQUEST_SPI3_RX |
|
|
LPDMA1_REQUEST_SPI3_TX |
u5 |
HAL_LPDMA1_REQUEST_SPI3_TX |
|
|
LPDMA1_REQUEST_I2C3_RX |
u5 |
HAL_LPDMA1_REQUEST_I2C3_RX |
|
|
LPDMA1_REQUEST_I2C3_TX |
u5 |
HAL_LPDMA1_REQUEST_I2C3_TX |
|
|
LPDMA1_REQUEST_I2C3_EVC |
u5 |
HAL_LPDMA1_REQUEST_I2C3_EVC |
|
|
LPDMA1_REQUEST_ADC4 |
u5 |
HAL_LPDMA1_REQUEST_ADC4 |
|
|
LPDMA1_REQUEST_DAC1_CH1 |
u5 |
HAL_LPDMA1_REQUEST_DAC1_CH1 |
|
|
LPDMA1_REQUEST_DAC1_CH2 |
u5 |
HAL_LPDMA1_REQUEST_DAC1_CH2 |
|
|
LPDMA1_REQUEST_ADF1_FLT0 |
u5 |
HAL_LPDMA1_REQUEST_ADF1_FLT0 |
|
|
LPDMA1_REQUEST_LPTIM1_IC1 |
u5 |
HAL_LPDMA1_REQUEST_LPTIM1_IC1 |
|
|
GPDMA1_REQUEST_HSPI1 |
u5 |
HAL_GPDMA1_REQUEST_HSPI1 |
|
|
GPDMA1_REQUEST_DCMI_PSSI |
u5 |
HAL_GPDMA1_REQUEST_DCMI_PSSI |
|
|
GPDMA1_REQUEST_LPTIM3_UE |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM3_UE |
|
|
GPDMA1_REQUEST_LPTIM3_IC1 |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM3_IC1 |
|
|
GPDMA1_REQUEST_AES_OUT |
u5, h5 |
HAL_GPDMA1_REQUEST_AES_OUT |
|
|
GPDMA1_REQUEST_HASH_IN |
u5, h5 |
HAL_GPDMA1_REQUEST_HASH_IN |
|
|
GPDMA1_REQUEST_UCPD1_TX |
u5, h5 |
HAL_GPDMA1_REQUEST_UCPD1_TX |
|
|
GPDMA1_REQUEST_UCPD1_RX |
u5, h5 |
HAL_GPDMA1_REQUEST_UCPD1_RX |
|
|
GPDMA1_REQUEST_MDF1_FLT0 |
u5 |
HAL_GPDMA1_REQUEST_MDF1_FLT0 |
|
|
GPDMA1_REQUEST_MDF1_FLT1 |
u5 |
HAL_GPDMA1_REQUEST_MDF1_FLT1 |
|
|
GPDMA1_REQUEST_MDF1_FLT2 |
u5 |
HAL_GPDMA1_REQUEST_MDF1_FLT2 |
|
|
GPDMA1_REQUEST_MDF1_FLT3 |
u5 |
HAL_GPDMA1_REQUEST_MDF1_FLT3 |
|
|
GPDMA1_REQUEST_MDF1_FLT4 |
u5 |
HAL_GPDMA1_REQUEST_MDF1_FLT4 |
|
|
GPDMA1_REQUEST_MDF1_FLT5 |
u5 |
HAL_GPDMA1_REQUEST_MDF1_FLT5 |
|
|
GPDMA1_REQUEST_ADF1_FLT0 |
u5 |
HAL_GPDMA1_REQUEST_ADF1_FLT0 |
|
|
GPDMA1_REQUEST_FMAC_READ |
u5, h5 |
HAL_GPDMA1_REQUEST_FMAC_RD |
|
|
GPDMA1_REQUEST_FMAC_WRITE |
u5, h5 |
HAL_GPDMA1_REQUEST_FMAC_WR |
|
|
GPDMA1_REQUEST_CORDIC_READ |
u5, h5 |
HAL_GPDMA1_REQUEST_CORDIC_RD |
|
|
GPDMA1_REQUEST_CORDIC_WRITE |
u5, h5 |
HAL_GPDMA1_REQUEST_CORDIC_WR |
|
|
GPDMA1_REQUEST_SAES_IN |
u5, h5 |
HAL_GPDMA1_REQUEST_SAES_IN |
|
|
GPDMA1_REQUEST_SAES_OUT |
u5, h5 |
HAL_GPDMA1_REQUEST_SAES_OUT |
|
|
GPDMA1_REQUEST_LPTIM1_IC1 |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM1_IC1 |
|
|
GPDMA1_REQUEST_LPTIM1_IC2 |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM1_IC2 |
|
|
GPDMA1_REQUEST_LPTIM1_UE |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM1_UE |
|
|
GPDMA1_REQUEST_LPTIM2_IC1 |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM2_IC1 |
|
|
GPDMA1_REQUEST_LPTIM2_IC2 |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM2_IC2 |
|
|
GPDMA1_REQUEST_LPTIM2_UE |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM2_UE |
|
|
GPDMA1_REQUEST_LPTIM3_IC2 |
u5, h5 |
HAL_GPDMA1_REQUEST_LPTIM3_IC2 |
|
|
GPDMA1_REQUEST_TIM3_TRIG |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM3_TRIG |
|
|
GPDMA1_REQUEST_LPTIM5_IC2 |
h5 |
HAL_GPDMA1_REQUEST_LPTIM5_IC2 |
|
|
GPDMA1_REQUEST_LPTIM6_IC1 |
h5 |
HAL_GPDMA1_REQUEST_LPTIM6_IC1 |
|
|
GPDMA2_REQUEST_FMAC_READ |
h5 |
HAL_GPDMA2_REQUEST_FMAC_RD |
|
|
GPDMA2_REQUEST_FMAC_WRITE |
h5 |
HAL_GPDMA2_REQUEST_FMAC_WR |
|
|
GPDMA2_REQUEST_SAES_OUT |
h5 |
HAL_GPDMA2_REQUEST_SAES_OUT |
|
|
GPDMA2_REQUEST_SAES_IN |
h5 |
HAL_GPDMA2_REQUEST_SAES_IN |
|
|
GPDMA2_REQUEST_I3C1_RX |
h5 |
HAL_GPDMA2_REQUEST_I3C1_RX |
|
|
GPDMA2_REQUEST_I3C1_TX |
h5 |
HAL_GPDMA2_REQUEST_I3C1_TX |
|
|
GPDMA2_REQUEST_I3C1_TC |
h5 |
HAL_GPDMA2_REQUEST_I3C1_TC |
|
|
GPDMA2_REQUEST_I3C1_RS |
h5 |
HAL_GPDMA2_REQUEST_I3C1_RS |
|
|
GPDMA2_REQUEST_I2C4_RX |
h5 |
HAL_GPDMA2_REQUEST_I2C4_RX |
|
|
GPDMA2_REQUEST_I2C4_TX |
h5 |
HAL_GPDMA2_REQUEST_I2C4_TX |
|
|
GPDMA2_REQUEST_CORDIC_WRITE |
h5 |
HAL_GPDMA2_REQUEST_CORDIC_WRITE |
|
|
GPDMA2_REQUEST_LPTIM3_IC1 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM3_IC1 |
|
|
GPDMA2_REQUEST_LPTIM3_UE |
h5 |
HAL_GPDMA2_REQUEST_LPTIM3_UE |
|
|
GPDMA2_REQUEST_LPTIM5_IC1 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM5_IC1 |
|
|
GPDMA2_REQUEST_LPTIM5_IC2 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM5_IC2 |
|
|
GPDMA2_REQUEST_LPTIM5_UE |
h5 |
HAL_GPDMA2_REQUEST_LPTIM5_UE |
|
|
GPDMA2_REQUEST_LPTIM6_IC1 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM6_IC1 |
|
|
GPDMA2_REQUEST_LPTIM6_IC2 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM6_IC2 |
|
|
GPDMA2_REQUEST_LPTIM6_UE |
h5 |
HAL_GPDMA2_REQUEST_LPTIM6_UE |
|
|
GPDMA2_REQUEST_I3C2_RX |
h5 |
HAL_GPDMA2_REQUEST_I3C2_RX |
|
|
GPDMA2_REQUEST_I3C2_TX |
h5 |
HAL_GPDMA2_REQUEST_I3C2_TX |
|
|
GPDMA2_REQUEST_I3C2_TC |
h5 |
HAL_GPDMA2_REQUEST_I3C2_TC |
|
|
GPDMA2_REQUEST_LPTIM3_IC2 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM3_IC2 |
|
|
GPDMA2_REQUEST_CORDIC_READ |
h5 |
HAL_GPDMA2_REQUEST_CORDIC_RD |
|
|
GPDMA2_REQUEST_UCPD1_TX |
h5 |
HAL_GPDMA2_REQUEST_UCPD1_TX |
|
|
GPDMA2_REQUEST_UCPD1_RX |
h5 |
HAL_GPDMA2_REQUEST_UCPD1_RX |
|
|
GPDMA2_REQUEST_TIM5_CH2 |
h5 |
HAL_GPDMA2_REQUEST_TIM5_CH2 |
|
|
GPDMA2_REQUEST_TIM5_CH3 |
h5 |
HAL_GPDMA2_REQUEST_TIM5_CH3 |
|
|
GPDMA2_REQUEST_TIM5_CH4 |
h5 |
HAL_GPDMA2_REQUEST_TIM5_CH4 |
|
|
GPDMA2_REQUEST_TIM5_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM5_UPD |
|
|
GPDMA2_REQUEST_TIM5_TRIG |
h5 |
HAL_GPDMA2_REQUEST_TIM5_TRGI |
|
|
GPDMA2_REQUEST_TIM15_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM15_CH1 |
|
|
GPDMA2_REQUEST_TIM15_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM15_UPD |
|
|
GPDMA2_REQUEST_TIM15_TRIG |
h5 |
HAL_GPDMA2_REQUEST_TIM15_TRGI |
|
|
GPDMA2_REQUEST_TIM15_COM |
h5 |
HAL_GPDMA2_REQUEST_TIM15_COM |
|
|
GPDMA2_REQUEST_TIM16_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM16_CH1 |
|
|
GPDMA2_REQUEST_TIM16_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM16_UPD |
|
|
GPDMA2_REQUEST_TIM17_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM17_CH1 |
|
|
GPDMA2_REQUEST_TIM17_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM17_UPD |
|
|
GPDMA2_REQUEST_LPTIM1_IC1 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM1_IC1 |
|
|
GPDMA2_REQUEST_LPTIM1_IC2 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM1_IC2 |
|
|
GPDMA2_REQUEST_LPTIM1_UE |
h5 |
HAL_GPDMA2_REQUEST_LPTIM1_UE |
|
|
GPDMA2_REQUEST_LPTIM2_IC1 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM2_IC1 |
|
|
GPDMA2_REQUEST_LPTIM2_IC2 |
h5 |
HAL_GPDMA2_REQUEST_LPTIM2_IC2 |
|
|
GPDMA2_REQUEST_LPTIM2_UE |
h5 |
HAL_GPDMA2_REQUEST_LPTIM2_UE |
|
|
GPDMA2_REQUEST_DCMI |
h5 |
HAL_GPDMA2_REQUEST_DCMI |
|
|
GPDMA2_REQUEST_AES_OUT |
h5 |
HAL_GPDMA2_REQUEST_AES_OUT |
|
|
GPDMA2_REQUEST_AES_IN |
h5 |
HAL_GPDMA2_REQUEST_AES_IN |
|
|
GPDMA2_REQUEST_HASH_IN |
h5 |
HAL_GPDMA2_REQUEST_HASH_IN |
|
|
GPDMA2_REQUEST_I3C2_RS |
h5 |
HAL_GPDMA2_REQUEST_I3C2_RS |
|
|
GPDMA1_REQUEST_LPTIM5_UE |
h5 |
HAL_GPDMA1_REQUEST_LPTIM5_UE |
|
|
DMA_PFCTRL |
h5, f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_ERROR_ULE |
u5, h5 |
HAL_DMA_ERROR_ULE |
|
|
DMA_REQUEST_TIM2_CH3 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM2_CC3 |
|
|
DMA_REQUEST_TIM2_CH4 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM2_CC4 |
|
|
DMA_REQUEST_TIM2_TRIG |
c0, g0 |
HAL_DMA_REQUEST_TIM2_TRGI |
|
|
DMA_REQUEST_TIM2_UP |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM2_UPD |
|
|
DMA_REQUEST_TIM3_CH1 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM3_CC1 |
|
|
DMA_REQUEST_TIM3_CH2 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM3_CC2 |
|
|
DMA_REQUEST_TIM3_CH3 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM3_CC3 |
|
|
DMA_REQUEST_TIM3_CH4 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM3_CC4 |
|
|
DMA_REQUEST_TIM3_TRIG |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM3_TRGI |
|
|
DMA_REQUEST_TIM3_UP |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM3_UPD |
|
|
DMA_REQUEST_TIM2_CH2 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM2_CC2 |
|
|
DMA_REQUEST_TIM15_CH1 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM15_CC1 |
|
|
DMA_REQUEST_TIM15_TRIG_COM |
c0, g0 |
HAL_DMA_REQUEST_TIM15_TRGI_COM |
|
|
DMA_REQUEST_TIM15_UP |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM15_UPD |
|
|
DMA_REQUEST_TIM16_CH1 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM16_CC1 |
|
|
DMA_REQUEST_TIM16_TRIG_COM |
c0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM16_UP |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM16_UPD |
|
|
DMA_REQUEST_TIM17_CH1 |
c0, l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM17_TRIG_COM |
c0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM17_UP |
c0, l4, g4, g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_USART1_RX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_USART1_RX |
|
|
DMA_REQUEST_USART1_TX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_USART1_TX |
|
|
DMA_REQUEST_TIM15_CH2 |
c0, g0 |
HAL_DMA_REQUEST_TIM15_CC2 |
|
|
DMA_REQUEST_TIM2_CH1 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM2_CC1 |
|
|
DMA_REQUEST_TIM1_UP |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM1_UPD |
|
|
DMA_REQUEST_TIM1_TRIG_COM |
c0, g0 |
HAL_DMA_REQUEST_TIM1_TRGI_COM |
|
|
HAL_DMA_ERROR_TE |
c0, l4, g4, g0, f4 |
HAL_DMA_ERROR_TE |
|
|
HAL_DMA_ERROR_DTE |
u5, h5 |
HAL_DMA_ERROR_DTE |
|
|
HAL_DMA_ERROR_NONE |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_ERROR_NONE |
|
|
HAL_DMA_ERROR_SYNC |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_ERROR_SYNC |
|
|
HAL_DMA_ERROR_REQGEN |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_ERROR_REQGEN |
|
|
DMA_REQUEST_MEM2MEM |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_SW |
|
|
DMA_REQUEST_GENERATOR0 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_MUX_GEN0 |
|
|
DMA_REQUEST_GENERATOR1 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_MUX_GEN1 |
|
|
DMA_REQUEST_GENERATOR2 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_MUX_GEN2 |
|
|
DMA_REQUEST_GENERATOR3 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_MUX_GEN3 |
|
|
DMA_REQUEST_ADC1 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_ADC1 |
|
|
DMA_REQUEST_I2C1_RX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_I2C1_RX |
|
|
DMA_REQUEST_I2C1_TX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_I2C1_TX |
|
|
DMA_REQUEST_I2C2_RX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_I2C2_RX |
|
|
DMA_REQUEST_I2C2_TX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_I2C2_TX |
|
|
DMA_REQUEST_SPI1_RX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_SPI1_RX |
|
|
DMA_REQUEST_SPI1_TX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_SPI1_TX |
|
|
DMA_REQUEST_SPI2_RX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_SPI2_RX |
|
|
DMA_REQUEST_SPI2_TX |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_SPI2_TX |
|
|
DMA_REQUEST_TIM1_CH1 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM1_CC1 |
|
|
DMA_REQUEST_TIM1_CH2 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM1_CC2 |
|
|
DMA_REQUEST_TIM1_CH3 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM1_CC3 |
|
|
DMA_REQUEST_TIM1_CH4 |
c0, l4, g4, g0 |
HAL_DMA_REQUEST_TIM1_CC4 |
|
|
GPDMA2_REQUEST_TIM4_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM4_UPD |
|
|
GPDMA2_REQUEST_TIM5_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM5_CH1 |
|
|
GPDMA2_REQUEST_TIM4_CH3 |
h5 |
HAL_GPDMA2_REQUEST_TIM4_CH3 |
|
|
GPDMA2_REQUEST_USART2_TX |
h5 |
HAL_GPDMA2_REQUEST_USART2_TX |
|
|
GPDMA2_REQUEST_USART3_RX |
h5 |
HAL_GPDMA2_REQUEST_USART3_RX |
|
|
GPDMA2_REQUEST_USART3_TX |
h5 |
HAL_GPDMA2_REQUEST_USART3_TX |
|
|
GPDMA2_REQUEST_UART4_RX |
h5 |
HAL_GPDMA2_REQUEST_UART4_RX |
|
|
GPDMA2_REQUEST_UART4_TX |
h5 |
HAL_GPDMA2_REQUEST_UART4_TX |
|
|
GPDMA2_REQUEST_UART5_RX |
h5 |
HAL_GPDMA2_REQUEST_UART5_RX |
|
|
GPDMA2_REQUEST_UART5_TX |
h5 |
HAL_GPDMA2_REQUEST_UART5_TX |
|
|
GPDMA2_REQUEST_USART6_RX |
h5 |
HAL_GPDMA2_REQUEST_USART6_RX |
|
|
GPDMA2_REQUEST_USART6_TX |
h5 |
HAL_GPDMA2_REQUEST_USART6_TX |
|
|
DMA_FLAG_IDLE |
u5, h5 |
HAL_DMA_XFER_FULL_COMPLETE |
|
|
GPDMA2_REQUEST_USART2_RX |
h5 |
HAL_GPDMA2_REQUEST_USART2_RX |
|
|
DMA_IT_TO |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_IT_SUSP |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_IT_USE |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_IT_ULE |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_IT_DTE |
u5, h5 |
Removed / New Usage changes |
|
|
DMA_IT_HT |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
DMA_IT_TC |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_ERROR_NOT_SUPPORTED |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_ERROR_INVALID_CALLBACK |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_ERROR_BUSY |
u5, h5, g0 |
Removed / New Usage changes |
|
|
HAL_DMA_ERROR_NO_XFER |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
GPDMA2_REQUEST_UART7_RX |
h5 |
HAL_GPDMA2_REQUEST_UART7_RX |
|
|
GPDMA2_REQUEST_USART1_TX |
h5 |
HAL_GPDMA2_REQUEST_USART1_TX |
|
|
GPDMA2_REQUEST_USART1_RX |
h5 |
HAL_GPDMA2_REQUEST_USART1_RX |
|
|
GPDMA2_REQUEST_I2C3_TX |
h5 |
HAL_GPDMA2_REQUEST_I2C3_TX |
|
|
GPDMA1_REQUEST_LPTIM6_IC2 |
h5 |
HAL_GPDMA1_REQUEST_LPTIM6_IC2 |
|
|
GPDMA1_REQUEST_LPTIM6_UE |
h5 |
HAL_GPDMA1_REQUEST_LPTIM6_UE |
|
|
GPDMA1_REQUEST_I3C2_RX |
h5 |
HAL_GPDMA1_REQUEST_I3C2_RX |
|
|
GPDMA1_REQUEST_I3C2_TX |
h5 |
HAL_GPDMA1_REQUEST_I3C2_TX |
|
|
GPDMA1_REQUEST_I3C2_TC |
h5 |
HAL_GPDMA1_REQUEST_I3C2_TC |
|
|
GPDMA1_REQUEST_I3C2_RS |
h5 |
HAL_GPDMA1_REQUEST_I3C2_RS |
|
|
GPDMA2_REQUEST_ADC1 |
h5 |
HAL_GPDMA2_REQUEST_ADC1 |
|
|
GPDMA2_REQUEST_ADC2 |
h5 |
HAL_GPDMA2_REQUEST_ADC2 |
|
|
GPDMA2_REQUEST_DAC1_CH1 |
h5 |
HAL_GPDMA2_REQUEST_DAC1_CH1 |
|
|
GPDMA2_REQUEST_DAC1_CH2 |
h5 |
HAL_GPDMA2_REQUEST_DAC1_CH2 |
|
|
GPDMA2_REQUEST_TIM6_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM6_UPD |
|
|
GPDMA2_REQUEST_TIM7_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM7_UPD |
|
|
GPDMA2_REQUEST_SPI1_RX |
h5 |
HAL_GPDMA2_REQUEST_SPI1_RX |
|
|
GPDMA2_REQUEST_SPI1_TX |
h5 |
HAL_GPDMA2_REQUEST_SPI1_TX |
|
|
GPDMA2_REQUEST_SPI2_RX |
h5 |
HAL_GPDMA2_REQUEST_SPI2_RX |
|
|
GPDMA2_REQUEST_SPI2_TX |
h5 |
HAL_GPDMA2_REQUEST_SPI2_TX |
|
|
GPDMA2_REQUEST_SPI3_RX |
h5 |
HAL_GPDMA2_REQUEST_SPI3_RX |
|
|
GPDMA2_REQUEST_SPI3_TX |
h5 |
HAL_GPDMA2_REQUEST_SPI3_TX |
|
|
GPDMA2_REQUEST_I2C1_RX |
h5 |
HAL_GPDMA2_REQUEST_I2C1_RX |
|
|
GPDMA2_REQUEST_I2C1_TX |
h5 |
HAL_GPDMA2_REQUEST_I2C1_TX |
|
|
GPDMA2_REQUEST_I2C2_RX |
h5 |
HAL_GPDMA2_REQUEST_I2C2_RX |
|
|
GPDMA2_REQUEST_I2C2_TX |
h5 |
HAL_GPDMA2_REQUEST_I2C2_TX |
|
|
GPDMA2_REQUEST_I2C3_RX |
h5 |
HAL_GPDMA2_REQUEST_I2C3_RX |
|
|
GPDMA2_REQUEST_TIM4_CH4 |
h5 |
HAL_GPDMA2_REQUEST_TIM4_CH4 |
|
|
HAL_DMA_ERROR_TO |
u5, h5 |
HAL_DMA_ERROR_TO |
|
|
HAL_DMA_ERROR_TIMEOUT |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_ERROR_USE |
u5, h5 |
HAL_DMA_ERROR_USE |
|
|
GPDMA2_REQUEST_TIM1_CH4 |
h5 |
HAL_GPDMA2_REQUEST_TIM1_CH4 |
|
|
GPDMA2_REQUEST_TIM1_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM1_UPD |
|
|
GPDMA2_REQUEST_TIM1_TRIG |
h5 |
HAL_GPDMA2_REQUEST_TIM1_TRGI |
|
|
GPDMA2_REQUEST_TIM1_COM |
h5 |
HAL_GPDMA2_REQUEST_TIM1_COM |
|
|
GPDMA2_REQUEST_TIM8_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM8_CH1 |
|
|
GPDMA2_REQUEST_TIM8_CH2 |
h5 |
HAL_GPDMA2_REQUEST_TIM8_CH2 |
|
|
GPDMA2_REQUEST_TIM8_CH3 |
h5 |
HAL_GPDMA2_REQUEST_TIM8_CH3 |
|
|
GPDMA2_REQUEST_TIM8_CH4 |
h5 |
HAL_GPDMA2_REQUEST_TIM8_CH4 |
|
|
GPDMA2_REQUEST_TIM8_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM8_UPD |
|
|
GPDMA2_REQUEST_TIM8_TRIG |
h5 |
HAL_GPDMA2_REQUEST_TIM8_TRGI |
|
|
GPDMA2_REQUEST_TIM8_COM |
h5 |
HAL_GPDMA2_REQUEST_TIM8_COM |
|
|
GPDMA2_REQUEST_TIM1_CH3 |
h5 |
HAL_GPDMA2_REQUEST_TIM1_CH3 |
|
|
GPDMA2_REQUEST_TIM2_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM2_CH1 |
|
|
GPDMA2_REQUEST_TIM2_CH3 |
h5 |
HAL_GPDMA2_REQUEST_TIM2_CH3 |
|
|
GPDMA2_REQUEST_TIM2_CH4 |
h5 |
HAL_GPDMA2_REQUEST_TIM2_CH4 |
|
|
GPDMA2_REQUEST_TIM2_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM2_UPD |
|
|
GPDMA2_REQUEST_TIM3_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM3_CH1 |
|
|
GPDMA2_REQUEST_TIM3_CH2 |
h5 |
HAL_GPDMA2_REQUEST_TIM3_CH2 |
|
|
GPDMA2_REQUEST_TIM3_CH3 |
h5 |
HAL_GPDMA2_REQUEST_TIM3_CH3 |
|
|
GPDMA2_REQUEST_TIM3_CH4 |
h5 |
HAL_GPDMA2_REQUEST_TIM3_CH4 |
|
|
GPDMA2_REQUEST_TIM3_UP |
h5 |
HAL_GPDMA2_REQUEST_TIM3_UPD |
|
|
GPDMA2_REQUEST_TIM3_TRIG |
h5 |
HAL_GPDMA2_REQUEST_TIM3_TRGI |
|
|
GPDMA2_REQUEST_TIM4_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM4_CH1 |
|
|
GPDMA2_REQUEST_TIM4_CH2 |
h5 |
HAL_GPDMA2_REQUEST_TIM4_CH2 |
|
|
GPDMA2_REQUEST_TIM2_CH2 |
h5 |
HAL_GPDMA2_REQUEST_TIM2_CH2 |
|
|
GPDMA2_REQUEST_TIM1_CH2 |
h5 |
HAL_GPDMA2_REQUEST_TIM1_CH2 |
|
|
GPDMA2_REQUEST_TIM1_CH1 |
h5 |
HAL_GPDMA2_REQUEST_TIM1_CH1 |
|
|
GPDMA2_REQUEST_OCTOSPI1 |
h5 |
HAL_GPDMA2_REQUEST_OCTOSPI1 |
|
|
GPDMA2_REQUEST_UART8_RX |
h5 |
HAL_GPDMA2_REQUEST_UART8_RX |
|
|
GPDMA2_REQUEST_UART8_TX |
h5 |
HAL_GPDMA2_REQUEST_UART8_TX |
|
|
GPDMA2_REQUEST_UART9_RX |
h5 |
HAL_GPDMA2_REQUEST_UART9_RX |
|
|
GPDMA2_REQUEST_UART9_TX |
h5 |
HAL_GPDMA2_REQUEST_UART9_TX |
|
|
GPDMA2_REQUEST_USART10_RX |
h5 |
HAL_GPDMA2_REQUEST_USART10_RX |
|
|
GPDMA2_REQUEST_USART10_TX |
h5 |
HAL_GPDMA2_REQUEST_USART10_TX |
|
|
GPDMA2_REQUEST_USART11_RX |
h5 |
HAL_GPDMA2_REQUEST_USART11_RX |
|
|
GPDMA2_REQUEST_USART11_TX |
h5 |
HAL_GPDMA2_REQUEST_USART11_TX |
|
|
GPDMA2_REQUEST_UART12_RX |
h5 |
HAL_GPDMA2_REQUEST_UART12_RX |
|
|
GPDMA2_REQUEST_UART12_TX |
h5 |
HAL_GPDMA2_REQUEST_UART12_TX |
|
|
GPDMA2_REQUEST_UART7_TX |
h5 |
HAL_GPDMA2_REQUEST_UART7_TX |
|
|
GPDMA2_REQUEST_LPUART1_RX |
h5 |
HAL_GPDMA2_REQUEST_LPUART1_RX |
|
|
GPDMA2_REQUEST_LPUART1_TX |
h5 |
HAL_GPDMA2_REQUEST_LPUART1_TX |
|
|
GPDMA2_REQUEST_SPI4_RX |
h5 |
HAL_GPDMA2_REQUEST_SPI4_RX |
|
|
GPDMA2_REQUEST_SPI4_TX |
h5 |
HAL_GPDMA2_REQUEST_SPI4_TX |
|
|
GPDMA2_REQUEST_SPI5_RX |
h5 |
HAL_GPDMA2_REQUEST_SPI5_RX |
|
|
GPDMA2_REQUEST_SPI5_TX |
h5 |
HAL_GPDMA2_REQUEST_SPI5_TX |
|
|
GPDMA2_REQUEST_SPI6_RX |
h5 |
HAL_GPDMA2_REQUEST_SPI6_RX |
|
|
GPDMA2_REQUEST_SPI6_TX |
h5 |
HAL_GPDMA2_REQUEST_SPI6_TX |
|
|
GPDMA2_REQUEST_SAI1_A |
h5 |
HAL_GPDMA2_REQUEST_SAI1_A |
|
|
GPDMA2_REQUEST_SAI1_B |
h5 |
HAL_GPDMA2_REQUEST_SAI1_B |
|
|
GPDMA2_REQUEST_SAI2_A |
h5 |
HAL_GPDMA2_REQUEST_SAI2_A |
|
|
GPDMA2_REQUEST_SAI2_B |
h5 |
HAL_GPDMA2_REQUEST_SAI2_B |
|
|
GPDMA1_REQUEST_TIM3_UP |
u5, h5 |
HAL_GPDMA1_REQUEST_TIM3_UPD |
|
|
DMA_REQUEST_USART6_TX |
g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_USART6_RX |
g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_USART5_TX |
g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_USART5_RX |
g0 |
Not implemented yet in HAL2. |
|
|
DMA_MAX_REQUEST |
g0 |
HAL_DMA_MAX_REQUEST |
|
|
DMA_REQUEST_LPUART2_TX |
g0 |
HAL_DMA_REQUEST_LPUART2_TX |
|
|
DMA_REQUEST_LPUART2_RX |
g0 |
HAL_DMA_REQUEST_LPUART2_RX |
|
|
DMA_REQUEST_TIM4_TRIG |
g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_TIM16_COM |
g0 |
HAL_DMA_REQUEST_TIM16_COM |
|
|
DMA_REQUEST_TIM17_COM |
g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_UCPD2_RX |
g0 |
Not implemented yet in HAL2. |
|
|
DMA_REQUEST_UCPD2_TX |
g0 |
Not implemented yet in HAL2. |
HAL DMA enumerations ¶
|
HAL1 |
series |
HAL2 |
Refer to |
|---|---|---|---|
|
HAL_DMA_QStateTypeDef |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_LevelCompleteTypeDef |
u5, h5, c0, l4, g4, g0, f4 |
hal_dma_xfer_level_t |
|
|
HAL_DMA_MemoryTypeDef |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_StateTypeDef |
u5, h5, c0, l4, g4, g0, f4 |
hal_dma_state_t |
|
|
HAL_DMA_CallbackIDTypeDef |
u5, h5, c0, l4, g4, g0, f4 |
hal_dma_cb_t |
|
|
HAL_DMA_QUEUE_STATE_BUSY |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_QUEUE_STATE_READY |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_QUEUE_STATE_RESET |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_XFER_M1CPLT_CB_ID |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_STATE_TIMEOUT |
c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_XFER_M1HALFCPLT_CB_ID |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_XFER_ALL_CB_ID |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
MEMORY1 |
f4 |
Not implemented yet in HAL2. |
|
|
MEMORY0 |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_STATE_RESET |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_STATE_RESET |
|
|
HAL_DMA_STATE_READY |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_STATE_IDLE |
|
|
HAL_DMA_STATE_BUSY |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_STATE_ACTIVE |
|
|
HAL_DMA_STATE_ERROR |
u5, h5, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_STATE_SUSPEND |
u5, h5 |
HAL_DMA_STATE_SUSPEND |
|
|
HAL_DMA_FULL_TRANSFER |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_XFER_FULL_COMPLETE |
|
|
HAL_DMA_HALF_TRANSFER |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_XFER_HALF_COMPLETE |
|
|
HAL_DMA_XFER_CPLT_CB_ID |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_XFER_HALFCPLT_CB_ID |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_STATE_ABORT |
u5, h5, f4 |
HAL_DMA_STATE_ABORT |
|
|
HAL_DMA_XFER_SUSPEND_CB_ID |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMA_XFER_ABORT_CB_ID |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_XFER_ERROR_CB_ID |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
HAL DMA macros ¶
|
HAL1 |
series |
HAL2 |
Refer to |
|---|---|---|---|
|
HAL_DMAMUX1_MAX_SYNC |
g0 |
Not implemented yet in HAL2. |
|
|
HAL_DMAMUX1_MAX_REQ_GEN |
g0 |
Not implemented yet in HAL2. |
|
|
__HAL_DMA_DISABLE |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_ENABLE_IT |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_GET_FLAG |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_CLEAR_FLAG |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_GET_FS |
f4 |
Not implemented yet in HAL2. |
|
|
__HAL_DMA_DISABLE_IT |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_GET_IT_SOURCE |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_SET_COUNTER |
u5, h5, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_GET_COUNTER |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_GET_TE_FLAG_INDEX |
c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_GET_GI_FLAG_INDEX |
c0, l4, g4, g0 |
Removed / New Usage changes |
|
|
__HAL_DMA_RESET_HANDLE_STATE |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_GET_FE_FLAG_INDEX |
f4 |
Not implemented yet in HAL2. |
|
|
__HAL_DMA_GET_DME_FLAG_INDEX |
f4 |
Not implemented yet in HAL2. |
|
|
__HAL_DMA_GET_HT_FLAG_INDEX |
c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_GET_TC_FLAG_INDEX |
c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
__HAL_DMA_ENABLE |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
HAL DMA structures ¶
|
HAL1 |
series |
HAL2 |
Refer to |
|---|---|---|---|
|
DMA_DataHandlingConfTypeDef |
u5, h5 |
hal_dma_data_handling_config_t |
|
|
DMA_TriggerConfTypeDef |
u5, h5 |
hal_dma_trigger_config_t |
|
|
DMA_InitTypeDef |
u5, h5, c0, l4, g4, g0, f4 |
hal_dma_direct_xfer_config_t |
|
|
DMA_InitLinkedListTypeDef |
u5, h5 |
hal_dma_linkedlist_xfer_config_t |
|
|
HAL_DMA_MuxRequestGeneratorConfigTypeDef |
c0, l4, g4, g0 |
hal_dma_dmamux_reqgen_config_t |
|
|
DMA_QListTypeDef |
u5, h5 |
hal_q_t |
|
|
DMA_HandleTypeDef |
u5, h5, c0, l4, g4, g0, f4 |
hal_dma_handle_t |
|
|
HAL_DMA_MuxSyncConfigTypeDef |
c0, l4, g4, g0 |
hal_dma_dmamux_sync_config_t |
|
|
DMA_NodeConfTypeDef |
u5, h5 |
hal_dma_node_config_t |
|
|
DMA_RepeatBlockConfTypeDef |
u5, h5 |
hal_dma_repeat_block_config_t |
|
|
DMA_NodeTypeDef |
u5, h5 |
hal_dma_node_t |
HAL DMA functions ¶
|
HAL1 |
series |
HAL2 |
Refer to |
|---|---|---|---|
|
HAL_DMAEx_MultiBufferStart_IT |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAEx_ConfigMuxRequestGenerator |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_SetConfigRequestGenerator |
|
|
HAL_DMAEx_EnableMuxRequestGenerator |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_EnableRequestGenerator |
|
|
HAL_DMAEx_DisableMuxRequestGenerator |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_DisableRequestGenerator |
|
|
HAL_DMAEx_ConfigMuxSync |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_SetConfigSync |
|
|
HAL_DMAEx_MUX_IRQHandler |
c0, l4, g4, g0 |
HAL_DMA_DMAMUX_IRQHandler |
|
|
HAL_DMAEx_MultiBufferStart |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMAEx_Resume |
u5, h5 |
HAL_DMA_Resume |
|
|
HAL_DMAEx_GetFifoLevel |
u5, h5 |
HAL_DMA_GetFifoDataByte |
|
|
HAL_DMAEx_List_RemoveNode_Head |
u5, h5 |
HAL_Q_RemoveNode_Head |
|
|
HAL_DMAEx_List_RemoveNode_Tail |
u5, h5 |
HAL_Q_RemoveNode_Tail |
|
|
HAL_DMAEx_List_ReplaceNode |
u5, h5 |
HAL_Q_ReplaceNode |
|
|
HAL_DMAEx_List_ReplaceNode_Head |
u5, h5 |
HAL_Q_ReplaceNode_Head |
|
|
HAL_DMAEx_List_ReplaceNode_Tail |
u5, h5 |
HAL_Q_ReplaceNode_Tail |
|
|
HAL_DMAEx_List_ResetQ |
u5, h5 |
HAL_Q_DEINIT |
|
|
HAL_DMAEx_List_InsertQ |
u5, h5 |
HAL_Q_InsertQ |
|
|
HAL_DMAEx_List_InsertQ_Head |
u5, h5 |
HAL_Q_InsertQ_Head |
|
|
HAL_DMAEx_List_InsertQ_Tail |
u5, h5 |
HAL_Q_InsertQ_Tail |
|
|
HAL_DMAEx_List_SetCircularModeConfig |
u5, h5 |
HAL_Q_SetCircularLinkQ |
|
|
HAL_DMAEx_List_SetCircularMode |
u5, h5 |
HAL_Q_SetCircularLinkQ_Head |
|
|
HAL_DMAEx_List_ClearCircularMode |
u5, h5 |
HAL_Q_ClearCircularLinkQ |
|
|
HAL_DMAEx_List_ConvertQToDynamic |
u5, h5 |
HAL_DMA_ConvertQNodesToDynamic |
|
|
HAL_DMAEx_List_ConvertQToStatic |
u5, h5 |
HAL_DMA_ConvertQNodesToStatic |
|
|
HAL_DMAEx_List_LinkQ |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMAEx_List_UnLinkQ |
u5, h5 |
Removed / New Usage changes |
|
|
HAL_DMAEx_ConfigDataHandling |
u5, h5 |
HAL_DMA_SetConfigDirectXferDataHandling |
|
|
HAL_DMAEx_ConfigTrigger |
u5, h5 |
HAL_DMA_SetConfigDirectXferTrigger |
|
|
HAL_DMAEx_ConfigRepeatBlock |
u5, h5 |
HAL_DMA_SetConfigDirectXferRepeatBlock |
|
|
HAL_DMAEx_Suspend |
u5, h5 |
HAL_DMA_Suspend |
|
|
HAL_DMAEx_Suspend_IT |
u5, h5 |
HAL_DMA_Suspend_IT |
|
|
HAL_DMAEx_List_RemoveNode |
u5, h5 |
HAL_Q_RemoveNode |
|
|
HAL_DMAEx_List_InsertNode_Tail |
u5, h5 |
HAL_Q_InsertNode_Tail |
|
|
HAL_DMAEx_List_InsertNode_Head |
u5, h5 |
HAL_Q_InsertNode_Head |
|
|
HAL_DMAEx_List_InsertNode |
u5, h5 |
HAL_Q_InsertNode |
|
|
HAL_DMA_GetError |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_GetLastErrorCodes |
|
|
HAL_DMA_GetState |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_GetState |
|
|
HAL_DMA_UnRegisterCallback |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_RegisterCallback |
u5, h5, c0, l4, g4, g0, f4 |
Removed / New Usage changes |
|
|
HAL_DMA_IRQHandler |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_IRQHandler |
|
|
HAL_DMA_PollForTransfer |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_PollForXfer |
|
|
HAL_DMA_CleanCallbacks |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_Abort_IT |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_Abort_IT |
|
|
HAL_DMA_Start_IT |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_StartDirectXfer_IT |
|
|
HAL_DMA_Start |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_StartDirectXfer |
|
|
HAL_DMA_DeInit |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_DeInit |
|
|
HAL_DMA_Init |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_Init |
|
|
HAL_DMAEx_List_Init |
u5, h5 |
HAL_DMA_Init |
|
|
HAL_DMAEx_List_DeInit |
u5, h5 |
HAL_DMA_DeInit |
|
|
HAL_DMAEx_List_Start |
u5, h5 |
HAL_DMA_StartLinkedListXfer |
|
|
HAL_DMAEx_List_Start_IT |
u5, h5 |
HAL_DMA_StartLinkedListXfer_IT |
|
|
HAL_DMAEx_List_BuildNode |
u5, h5 |
HAL_DMA_FillNodeConfig |
|
|
HAL_DMAEx_List_GetNodeConfig |
u5, h5 |
HAL_DMA_GetNodeConfig |
|
|
HAL_DMA_Abort |
u5, h5, c0, l4, g4, g0, f4 |
HAL_DMA_Abort |
|
|
HAL_DMAEx_ChangeMemory |
f4 |
Not implemented yet in HAL2. |
|
|
HAL_DMA_ConfigChannelAttributes |
u5, h5 |
HAL_DMA_SetXferSecAttr HAL_DMA_SetSecAttr HAL_DMA_SetPrivAttr |
|
|
HAL_DMA_GetConfigChannelAttributes |
u5, h5 |
HAL_DMA_GetXferSecAttr HAL_DMA_GetSecAttr HAL_DMA_GetPrivAttr |
|
|
HAL_DMA_LockChannelAttributes |
u5, h5 |
HAL_DMA_LockAttr |
|
|
HAL_DMA_GetLockChannelAttributes |
u5, h5 |
HAL_DMA_IsLockedAttr |
HAL DMA legacy aliases (HAL1 to HAL1) ¶
Note
This table provides a list of HAL1 to HAL1 legacy aliases defined in the stm32_hal_legacy.h HAL1 header file. To migrate the aliased HAL1 APIs, search for them in the HAL1 to HAL2 sections: HAL DMA constants, HAL DMA enumerations, HAL DMA macros, HAL DMA structures, HAL DMA functions.
|
HAL1 legacy API alias |
HAL1 API |
|---|---|
|
HAL_REMAPDMA_ADC_DMA_CH2 |
DMA_REMAP_ADC_DMA_CH2 |
|
HAL_REMAPDMA_USART1_TX_DMA_CH4 |
DMA_REMAP_USART1_TX_DMA_CH4 |
|
HAL_REMAPDMA_USART1_RX_DMA_CH5 |
DMA_REMAP_USART1_RX_DMA_CH5 |
|
HAL_REMAPDMA_TIM16_DMA_CH4 |
DMA_REMAP_TIM16_DMA_CH4 |
|
HAL_REMAPDMA_TIM17_DMA_CH2 |
DMA_REMAP_TIM17_DMA_CH2 |
|
HAL_REMAPDMA_USART3_DMA_CH32 |
DMA_REMAP_USART3_DMA_CH32 |
|
HAL_REMAPDMA_TIM16_DMA_CH6 |
DMA_REMAP_TIM16_DMA_CH6 |
|
HAL_REMAPDMA_TIM17_DMA_CH7 |
DMA_REMAP_TIM17_DMA_CH7 |
|
HAL_REMAPDMA_SPI2_DMA_CH67 |
DMA_REMAP_SPI2_DMA_CH67 |
|
HAL_REMAPDMA_USART2_DMA_CH67 |
DMA_REMAP_USART2_DMA_CH67 |
|
HAL_REMAPDMA_I2C1_DMA_CH76 |
DMA_REMAP_I2C1_DMA_CH76 |
|
HAL_REMAPDMA_TIM1_DMA_CH6 |
DMA_REMAP_TIM1_DMA_CH6 |
|
HAL_REMAPDMA_TIM2_DMA_CH7 |
DMA_REMAP_TIM2_DMA_CH7 |
|
HAL_REMAPDMA_TIM3_DMA_CH6 |
DMA_REMAP_TIM3_DMA_CH6 |
|
IS_HAL_REMAPDMA |
IS_DMA_REMAP |
|
__HAL_REMAPDMA_CHANNEL_ENABLE |
__HAL_DMA_REMAP_CHANNEL_ENABLE |
|
__HAL_REMAPDMA_CHANNEL_DISABLE |
__HAL_DMA_REMAP_CHANNEL_DISABLE |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI0 |
HAL_DMAMUX1_REQ_GEN_EXTI0 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI1 |
HAL_DMAMUX1_REQ_GEN_EXTI1 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI2 |
HAL_DMAMUX1_REQ_GEN_EXTI2 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI3 |
HAL_DMAMUX1_REQ_GEN_EXTI3 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI4 |
HAL_DMAMUX1_REQ_GEN_EXTI4 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI5 |
HAL_DMAMUX1_REQ_GEN_EXTI5 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI6 |
HAL_DMAMUX1_REQ_GEN_EXTI6 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI7 |
HAL_DMAMUX1_REQ_GEN_EXTI7 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI8 |
HAL_DMAMUX1_REQ_GEN_EXTI8 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI9 |
HAL_DMAMUX1_REQ_GEN_EXTI9 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI10 |
HAL_DMAMUX1_REQ_GEN_EXTI10 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI11 |
HAL_DMAMUX1_REQ_GEN_EXTI11 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI12 |
HAL_DMAMUX1_REQ_GEN_EXTI12 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI13 |
HAL_DMAMUX1_REQ_GEN_EXTI13 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI14 |
HAL_DMAMUX1_REQ_GEN_EXTI14 |
|
HAL_DMAMUX1_REQUEST_GEN_EXTI15 |
HAL_DMAMUX1_REQ_GEN_EXTI15 |
|
HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT |
HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT |
|
HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT |
HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT |
|
HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT |
HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT |
|
HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT |
HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT |
|
HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT |
HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT |
|
HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT |
HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT |
|
HAL_DMAMUX1_REQUEST_GEN_DSI_TE |
HAL_DMAMUX1_REQ_GEN_DSI_TE |
|
HAL_DMAMUX1_REQUEST_GEN_DSI_EOT |
HAL_DMAMUX1_REQ_GEN_DSI_EOT |
|
HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT |
HAL_DMAMUX1_REQ_GEN_DMA2D_EOT |
|
HAL_DMAMUX1_REQUEST_GEN_LTDC_IT |
HAL_DMAMUX1_REQ_GEN_LTDC_IT |
|
HAL_DMAMUX_REQUEST_GEN_NO_EVENT |
HAL_DMAMUX_REQ_GEN_NO_EVENT |
|
HAL_DMAMUX_REQUEST_GEN_RISING |
HAL_DMAMUX_REQ_GEN_RISING |
|
HAL_DMAMUX_REQUEST_GEN_FALLING |
HAL_DMAMUX_REQ_GEN_FALLING |
|
HAL_DMAMUX_REQUEST_GEN_RISING_FALLING |
HAL_DMAMUX_REQ_GEN_RISING_FALLING |
|
DMA_REQUEST_DCMI_PSSI |
DMA_REQUEST_DCMI |
|
DMA_REQUEST_DAC1_CHANNEL1 |
DMA_REQUEST_DAC1_CH1 |
|
DMA_REQUEST_DAC1_CHANNEL2 |
DMA_REQUEST_DAC1_CH2 |
|
DMA_REQUEST_TIM16_TRIG_COM |
DMA_REQUEST_TIM16_COM |
|
DMA_REQUEST_TIM17_TRIG_COM |
DMA_REQUEST_TIM17_COM |
|
LL_DMAMUX_REQ_TIM16_TRIG_COM |
LL_DMAMUX_REQ_TIM16_COM |
|
LL_DMAMUX_REQ_TIM17_TRIG_COM |
LL_DMAMUX_REQ_TIM17_COM |
|
GPDMA1_REQUEST_DCMI |
GPDMA1_REQUEST_DCMI_PSSI |